Patents Assigned to Dongbu HiTek, Ltd.
  • Patent number: 7681519
    Abstract: Embodiments relate to an apparatus for coating a photoresist layer and a photolithography method using the apparatus. In embodiments, the apparatus may include a rotatable wafer support for supporting a wafer to be coated with a photoresist layer, a beam nozzle for performing WEE (Wafer Edge Exposure) with respect to a photoresist layer at an edge of the wafer on the wafer support, and a spray nozzle for spraying an alkali solution onto an edge of the wafer exposed through the beam nozzle.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: March 23, 2010
    Assignee: Dongbu HiTek Ltd., Co.
    Inventor: Chang Young Hong
  • Patent number: 7682969
    Abstract: A method of forming a semiconductor device that includes heating a wafer on which an Al—Cu sputtering thin film is formed before patterning the Al—Cu sputtering thin film. The heating is performed at a temperature no less than a solid solution temperature of copper or at a temperature between 300° C. and 600° C. The process temperature in heating the process wafer is not higher than the flow temperature of aluminum or is the temperature at which a reflow process can be performed.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: March 23, 2010
    Assignee: Dongbu HiTek Ltd., Co.
    Inventors: Kyeong-Sik Lee, Joog-Guk Kim
  • Patent number: 7642169
    Abstract: Embodiments relate to a bipolar junction transistor and a method for manufacturing the same. An oxide pattern may be formed on a P type semiconductor substrate. A low-density N type collector area may be formed in the semiconductor substrate. First spacers may be formed at sidewalls of the oxide pattern, and a low-density P type base area may be formed in the semiconductor substrate. Second spacers may be formed on sidewalls of the first spacers. A high-density N type emitter area may be formed in the low-density P type base area between the second spacers, and a high-density N type collector area may be formed in the semiconductor substrate at an outside of the first spacers. The bipolar junction transistor may be realized through a self-aligned scheme using dual nitride spacers. A base width between the emitter area and the low-density collector area may be narrowed by the width of the second spacer.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: January 5, 2010
    Assignee: Dongbu HiTek, Ltd.
    Inventor: Kwang Young Ko