Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A method for managing flash memory operations in a flash memory, comprising; assigning a state code to said flash memory operations; updating a state code flag with the assigned state code upon completion of each of said flash memory operations; wherein the assignment of said state codes is selected in a way that each of said updating a state code flag is performed by changing of one bit of the state code flag from one to zero.

Abstract: A method, implementable on a multiple-input, multiple-output symbol receiver, includes selecting a hypothesis for a second symbol value U2 from among the set of fixed constellation points, calculating a hypothesis for a first symbol value U1 from the resultant selected U2 value, and generating a first half of counter-hypotheses from interim results of calculating the hypotheses values.

Abstract: A method and apparatus for filtering a reference signal by a series of taps having coefficients, comprising dividing the taps into at least one layer of a plurality of groups, each group comprising a plurality of taps, as a first layer, forming a plurality of coefficients arranged in at least one group, as at least one subsequent layer and forwarding multiply-accumulate results of each group in each layer sequentially to the at least one group in the at least one subsequent layer to generate an output signal, and adjusting the coefficients based on an error signal formed as a difference between the output signal and a received input signal related to the reference signal and an interim error signal as a difference between the input signal and a summation of the multiply-accumulate results of at least one layer.

Abstract: In a communication environment configured to transfer data from a transmitting end to a receiving end according to a wireless device communication protocol, said wireless device communication protocol is configured with a field comprising a first content, a method for signaling, comprising: replacing the first content of the field with a second content, the second content is a result of a bit manipulation on said first content of the field; transmitting said second content of the field, by the transmitting end, of the second content of the field is requested and transmitting the first content of the field when signaling of the second content of the field is not required; receiving said second content of the field or first content of the field by the receiver end; and determining if a signaling was performed according to said first content of the field or said second content of the field.

Abstract: A novel and useful RF switch that comprises four transistors configured to have four operating states, wherein at any time at most one transistor is in ‘on’ state. The switch is an on-chip switch and is constructed in using CMOS processes and technology. The switch is optionally a double pole, double throw (DPDT) switch. The switch can be used in numerous mobile devices such as a cellular phone or in the handset or base station of a cordless phone. The switch optionally selects between two antennas and between transmitter and receiver circuits. Within the switch, at least one of the at least four transistors is optionally an N-channel Metal Oxide Semiconductor (NMOS) transistor. The switch can further comprise one or more logic control circuits providing biasing voltages to one or more of the transistors. Within the switch, the control circuit comprises logic components for providing appropriate biasing voltages to the drain, source and gate terminals of the transistors in the switch.

Abstract: An electronic circuit, including, a power amplifier adapted to amplify an RF signal and provide it as output from the integrated circuit; a power source that is adapted to provide an unregulated voltage to the power amplifier; a regulator adapted to provide a regulated bias voltage; a subtracter that is adapted to accept a voltage proportional to the unregulated voltage and subtract it from the bias voltage to provide a reference voltage to the power amplifier; wherein the power amplifier is adapted to use the reference voltage to adjust the output from the power amplifier so that it will provide a stable power output.

Abstract: A dual pole dual through switch for switching between at least four states. The switch comprises four transistors such as N-channel Metal Oxide Semiconductor transistors, such that at each state at most one transistor is in “on” state, and the others are in “off” state. Each transistor has its own control circuit, which provides zero or negative voltage to the drain of the transistor, positive voltage to the source of the transistor, and control alternating voltage to the gate of the transistor. The switch can be used on-chip for devices. Such devices may include a base station or a handset of a cordless phone.

Abstract: A method for coordinating an encoder and a decoder in a wireless communication system employing discontinuous transmission, the method comprising performing a syncless reset command on the encoder and the decoder, in order to bring the encoder and decoder into stable and compatible states. The syncless reset command can be implemented by setting the variables of the encoder and decoder into predetermined values, or by performing a normal reset command followed by encoding or decoding a predetermined number of predetermined sample values.

Abstract: The subject matter discloses an apparatus configured for detecting type of a connection of an electrical module to an electrical node of an electrical circuit, the apparatus comprising a pulse generator configured for generating a first pulse; and a sampling circuit configured for applying a reaction of the electrical circuit on the first pulse to provide a sampled pulse and for detecting the type of connection from the sampled pulse. The electrical module comprising a capacitor or an inductor.

Abstract: A device and method of fast automatic gain control in quadrature receivers are disclosed. The AGC activity between the I and Q branches is split where in one branch the receive chain is in a certain gain state and in the other branch the receive chain is in another possible gain state, resulting in a significant shortening of the AGC duration of any IQ receiver.

Abstract: An integrated circuit, including, a die with an electronic circuit embedded thereon; wherein the electronic circuit includes a differential power amplifier and pads to electronically interface with the electronic circuit; a packaging encasing the die with contact pins to connect between the integrated circuit and external elements; wires connecting between the pads and the contact pins; a converter that includes capacitors and inductors to combine the outputs from the differential power amplifier to form a single ended output at one of the contact pins; wherein inherent inductance of some of the wires serve as the inductors of the converter.

Abstract: A method for managing flash memory operations in a flash memory, comprising; assigning a state code to said flash memory operations; updating a state code flag with the assigned state code upon completion of each of said flash memory operations; wherein the assignment of said state codes is selected in a way that each of said updating a state code flag is performed by changing of one bit of the state code flag from one to zero.

Abstract: An integrated circuit, including: a low dropout regulator configured to output regulated power to a device that can be in standard mode drawing power from the regulator or in idle mode during which it substantially does not draw power from the regulator; a capacitor in parallel to the regulator's output configured to be charged when the regulator is enabled and to provide power instead of the regulator when the regulator is disabled; a control configured to disable and enable the regulator; wherein the control is configured to disable the regulator when the device is in idle mode and enable the regulator when the device is in standard mode; and wherein during idle mode the control enables the regulator at various times to prevent the charge of the capacitor from decreasing more than a pre-selected amount.