Patents Assigned to DSP Group Switzerland AG
  • Patent number: 8787301
    Abstract: A device for transmitting data packets over a data link, including an interference signal detector adapted to continually detect a frequency of interference signals on the data link, designator adapted to assign a first frequency channel and a first time slot on the data link, wherein the first frequency channels lies within a 2.4 GHz industrial scientific and medical (ISM) band, and adapted to assign a second frequency channel and a second time slot on the data link, wherein the second frequency channel lies within a 5.8 GHz ISM Band, transmitter adapted to transmit each data packet within the first time slot and the first frequency channel and within the second time slot and the second frequency channel, if the frequency of the interference signals lies within the 2.4 GHz or the 5.8 GHz band.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: July 22, 2014
    Assignee: DSP Group Switzerland AG
    Inventor: Martin Haeusler
  • Patent number: 7948928
    Abstract: Cordless telephones according to the DECT standard are constantly transmitting a so-called dummy barrier at a certain power level, repetition interval and transmit frequency to apply corrections to the synchronization counters in the portable parts for synchronization to the fixed part. According to the present invention, once timing of the portable part is synchronized to the fixed part, a wired connection is used for applying these small synchronization corrections with respect to the synchronization between the portable part and the fixed part of the DECT telephone system. Advantageously, an emission of electromagnetic energy is thereby reduced significantly.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: May 24, 2011
    Assignee: DSP Group Switzerland AG
    Inventors: Otmar Rengert, Martin Häusler
  • Patent number: 7652316
    Abstract: The invention relates to in particular a lateral DMOST with a drain extension (8). In the known transistor a further metal strip (20) is positioned between the gate electrode contact strip and the drain contact (16) which is electrically connected with the source region contact (15). In the device proposed here, the connection between the further metal strip (20) and the source contact (15,12) comprises a capacitor (30) and the further metal strip (20) is provided with a further contact region (35) for delivering a voltage to the further metal strip (20). In this way an improved linearity is possible and the usefulness of the device is improved in particular at high power and at high frequencies. Preferably the capacitor (30) is integrated with the transistor in a single semiconductor body (1). The invention further comprises a method of operating a device (10) according to the invention.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: January 26, 2010
    Assignee: DSP Group Switzerland AG
    Inventors: Radjindrepersad Gajadharsing, Thomas Christian Roedle, Petra Christina Anna Hammes, Stephan Jo Cecile Henri Theeuwen
  • Patent number: 7535208
    Abstract: An improved capacitive feedback circuit (20) comprises a feedback capacitor (23) having its output terminal connected to a high-impedance node (N). More particularly, the improved capacitive feedback circuit comprises a first branch (24) having a bias current source (25), an amplifying element (26), and a current sensor (27) connected in series, the amplifying element having a high-impedance control terminal (26c). The feedback capacitor (23) has its output terminal connected to said control terminal (26c). A current-to-voltage converting feedback loop (28) has a high-impedance output terminal (28c) connected to said feedback capacitor output terminal.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: May 19, 2009
    Assignee: DSP Group Switzerland AG
    Inventor: Guillaume De Cremoux
  • Patent number: 7536509
    Abstract: The method uses an integrated circuit comprising a processor (603), a non-volatile memory (602), especially a flash memory, a system clock and an interface (605), which is connected on the one side to the processor (602) and on the other side to the non-volatile memory (602). When the address (ba[ ]) provided by the processor (603) has changed, the interface (605) leads the address (ba[ ]) to the non-volatile memory (602), creates a strobe signal (CL; DCR) within the system clock cycle during which the address (ba[ ]) has changed and directs it to the non-volatile memory (602). As soon as the data in the non-volatile memory (602) corresponding to the address (ba[ ]) are available the data will be directed to the processor (603). Thereby it is possible to get on the integrated circuit the highest data throughput according to the flash memory (602) access time and a minimized chip area at the same time.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: May 19, 2009
    Assignee: DSP Group Switzerland AG
    Inventors: Fabrizio Campanale, Gijs Van Steenwijk
  • Patent number: 7526302
    Abstract: The invention relates to a method of synchronizing a mobile station with a base station in a wireless communications system, to a mobile station for a wireless communications system, as well as to a wireless communications system of this kind. In order to enable faster ultimate synchronization, it is proposed to compare components of the received data not only with a stored synchronization pattern, but also with a stored identification pattern prior to the adaptation of the timing of the mobile station to received data. Already before the synchronization it can thus be determined with a high degree of probability whether received data originates from a desired base station or not. The necessity of checking the contents of packets which are not associated with a desired base station can thus be avoided.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: April 28, 2009
    Assignee: DSP Group Switzerland AG
    Inventor: Christopher Stobart
  • Publication number: 20090092119
    Abstract: The present invention relates to a transceiver device and a method of controlling a time-division multiplex frame structure with time slots in active mode in which a bearer is established, and time slots in an idle mode in which no bearer is established. Adjacent first and second time slots are set in a scanning mode when the transceiver device is listening for bearer set-up attempts, and the first time slot is switched from the scanning mode to the idle mode if a bearer has been established in the adjacent second time slot and the adjacent second time slot is set into the active mode. Thereby, a non-blind-slot scanning mode is provided which enables maximum number of active full and double slots in systems with blind slot radio.
    Type: Application
    Filed: December 20, 2006
    Publication date: April 9, 2009
    Applicant: DSP GROUP SWITZERLAND AG
    Inventor: Otmar Rengert
  • Patent number: 7479741
    Abstract: The invention relates to a device for lighting at least one light emitting diode to be supplied with predefined minimum forward voltage and maximum current. It comprises: —voltage supply means for supplying voltage to the light emitting diode, —a pulse generator for generating a cyclic pulse signal having predefined on-times and off-times, —a switch, controlled by the pulse generator to be turned on during said on-times to short-circuit the light emitting diode and turned off during said off-times, —an inductive device for increasing the forward voltage over the light emitting diode when the switch is turned off, so that said forward voltage gets higher that the minimum forward voltage and for decreasing said forward voltage when the switch is turned on, so that the current through the light emitting diode remains below the maximum current.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: January 20, 2009
    Assignee: DSP Group Switzerland AG
    Inventors: Lukas Haener, Juerg Fries
  • Patent number: 7466114
    Abstract: A voltage converter comprises an inductive circuit (L) for storing energy during an inductive magnetizing mode and transferring energy during an inductive demagnetizing mode. In addition the voltage converter comprises at least two non-inverting branches (12, 13, 14) for providing at least two non-inverted output voltages (Va, Vb, Vc) and an inverting branch (15) for providing an inverted output voltage. The inverting (15) and non-inverting (12, 13, 14) branches being parallely coupled to an output (10) of the inductive circuit (L). The inductive circuit being arranged to transfer energy to the inverting branch (15) and to one of the at least two non-inverting branches (12, 13, 14). Through this, the inverted voltage (Vinv) and the corresponding non-inverted output voltage (Va, Vb, Vc) of the one of the at least two non-inverting branches (12, 13, 14) are having an opposite polarity and a substantially equal magnitude.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: December 16, 2008
    Assignee: DSP Group Switzerland AG
    Inventors: Henricus Petronella Maria Derckx, Patrick Emanuel Gerardus Smeets, Hermanus Johannes Effing, Wilhelmus Johannes Robertus Van Lier
  • Patent number: 7420409
    Abstract: The invention relates to a demodulator to demodulate frequency-modulated signals FM including a phase locked loop PLL including at least a phase detector, a loop filter and a voltage controlled oscillator function VCO?, characterized in that said voltage controlled oscillator function VCO? has modifiable gain. The invention allows to eliminate drawbacks presented by the conventional use of a complex gain modifiable amplifier at the input of demodulated signal processing means. Application: demodulation of modulated signals: wireless phone, home network.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: September 2, 2008
    Assignee: DSP Group Switzerland AG
    Inventors: Eric Desbonnets, Frédéric Parillaud, Erick Giroux
  • Patent number: 7389384
    Abstract: The integrated circuit according to the invention comprises a processor (603), a non-volatile memory (602) and an interface (605), where said interface (605) contains a first cache memory (601.1) and a second cache memory (601.2) and connects the processor (603) to the non-volatile memory (602). The interface (605) gets data from the non-volatile memory (602) and stores them in said first or said second cache memory (601.1, 601.2) intermediately and provides the processor (603) with data from said first cache memory (601.1) or from said second cache memory (601.2), depending on where the requested data are stored.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: June 17, 2008
    Assignee: DSP Group Switzerland AG
    Inventors: Gijs Van Steenwijk, Fabrizio Campanale