Patents Assigned to DSPG GROUP LTD.
  • Publication number: 20140015579
    Abstract: A system that may include a slow clock event generator arranged to generate the slow clock event; a fast clock edge type detector that is arranged to perform a determination process of determining whether an earliest fast clock edge that occurs within a slow clock event is a rising clock edge or a falling clock edge, and whether a last fast clock edge that occurs within the slow clock event is a rising clock edge or a falling clock edge; and a counter module that is arranged to count fast clock cycles during the slow clock event to provide a duration estimate indicative of duration of the slow clock event and generate a slow clock event duration value indicative of the duration of the slow clock event, in response to the duration estimate and to a determination result that is indicative of an outcome of the determination process.
    Type: Application
    Filed: July 16, 2012
    Publication date: January 16, 2014
    Applicant: DSPG GROUP LTD.
    Inventors: David Shkolnik, Igal Sadoun