Abstract: A field effect transistor (FET) includes a substrate, a back barrier disposed on the substrate, a channel disposed on the back barrier, a front barrier disposed on the channel, a source, and a drain, such that at least one of the front barrier and the back barrier includes an anti-barrier-conduction (ABC) spacer which reduces parasitic conduction on a path from the source to the drain through at least one of the front barrier and the back barrier, reduces ON-state leakage from the channel to gate or substrate of the FET via resonant tunneling, and reduces OFF-state leakage by presenting tall barriers to electrons as well as electron-holes. This results in a highly linear, low gate leakage, low parasitic conduction, and low noise operation of FET.

Abstract: A structure and manufacturing process produce an airbridge for semiconductor devices and circuit applications. Magnesium oxide (MgO) is used to fabricate airbridges. The use of evaporated MgO allows for a thicker and strong airbridge structure, and increases the yield during the singulation of the fabricated devices and circuits. Using MgO as a sacrificial layer provides the flexibility for the sacrificial layer to be removed during the backend process, thereby avoiding any damage in the airbridge structures. In an alternative embodiment, some or all of the MgO can be retained in the airbridge structure, allowing for high density interconnects especially for ground connected interconnects.

Abstract: A transmit-receive (T-R) circuit is switchable for both small and large signals using a high impedance low noise amplifier, which lacks T-R switches, and which permits implementation using only bipolar transistors for integration into the fabrication of integrated circuits. The relatively large T-R switch loss is eliminated, resulting in better efficiency in operation of the T-R circuit. When the T-R circuit is in a transmit mode, a power amplifier is in an ON state, and the low noise amplifier is in an OFF state, such that the low noise amplifier has a high impedance between the LNA input and the LNA output to block a first signal from the LNA input from reaching the antenna. When the T-R circuit is in a receive mode, the power amplifier is in an OFF state, and the low noise amplifier is in an ON state with a low impedance.

Abstract: A method for fabricating an electronic device includes fabricating a plurality of electronic components on a substrate; fabricating a plurality of posts on the plurality of electronic components; depositing filling material between the plurality of posts; and depositing a plurality of top layers, with each top layer disposed on a respective post, thereby fabricating the electronic device. Each top layer is composed of a metal. The step of fabricating the posts includes: fabricating the posts to have identical heights above the substrate. Each post is thermally-conductive, and may be composed of gold. The filling material is composed of MgO, which may be electron beam evaporated to be disposed between the posts. The step of depositing the filling material includes: controlling a thickness of the MgO being deposited by controlling an evaporation rate of the MgO.

Abstract: A PIN diode has an anode spaced away from a central region of a top surface of a substrate, such that the anode is in a corner or at a side edge of the top surface. Alternatively, the PIN diode has an anode surrounded by a shield layer. The PIN diode reduces unwanted parasitic capacitance to increase the reverse isolation of RF switches and to reduce the diffusion capacitance to increase the f3dB frequency specification of amplifier circuits. The PIN diode dramatically reduces the values of both parasitic and diffusion capacitances, which enables its application in switches and amplifiers under a wide variety of bias conditions including reverse, low-moderate forward, and large forward-bias; which enables bonding to a much larger metal area than the active electrode, with negligible increase in the parasitic capacitance; and which enables reliable wire-bonding by presenting a highly planar metal surface.