Abstract: This disclosure pertains to a semiconductor device comprising a substrate layer, a buffer layer arranged on the substrate layer, a channel layer arranged on the buffer layer, and a barrier layer forming a two-dimensional electron gas (2DHG) at its interface with the channel layer, a plurality of epitaxial layers arranged on the barrier layer forming a two-dimensional hole gas, a plurality of source terminals, of drain terminals, and a gate terminal arranged over a passivation layer positioned on one of the epitaxial layers, the gate terminal being configured to control electrical conduction in two-dimensional electron gas and in the a two-dimensional hole gas (2DHG).