Patents Assigned to EADS Defence and Security Networks
  • Patent number: 6560715
    Abstract: For triggering actions synchronous with a system clock in an electronic system comprising a management processor, a program memory and peripheral units, the sequencer comprises: an instruction register including a date field for containing an instruction execution date, an instruction code field and a data field, means for loading the instruction register from the program memory via a DMA channel, a comparator receiving a current date obtained from the system clock and the execution date contained in the date field of the instruction register, and a control logic unit for decoding the contents of the instruction code and data fields of the instruction register and triggering actions deduced from such decoding at the time the comparator shows that the current date has reached the execution date in the peripheral units and without intervention by the management processor.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: May 6, 2003
    Assignee: EADS Defence and Security Networks
    Inventors: Jean-Pierre Bourdillat, Michel Richy
  • Patent number: 6483827
    Abstract: The radio station has DECT circuitry for processing one or more bit streams to be transmitted over a communication channel divided into successive 10 ms radio frames each having a plurality of timeslots, each bit stream being allocated one of the timeslots in each frame. The DECT circuitry extracts bit sequences from each bit stream and modulates each of the bit sequences to form a respective radio signal burst inserted into a timeslot allocated to the bit stream in accordance with DECT formats. A clock generator, including a crystal oscillator and frequency dividers, produces a first clock signal having a frequency adapted for set the bit rate of each bit stream to 32 kbit/s, and a second clock signal having a frequency adapted for setting the bit rate within each bit sequence to 1.024 kbit/s, whereby the DECT formats remain valid while the channel has a reduced spectra bandwidth.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: November 19, 2002
    Assignee: EADS Defence and Security Networks
    Inventor: Adre Le Torc'h
  • Patent number: 6459742
    Abstract: The successive symbols of a digital stream are converted into phase increments which are accumulated. A modulating phase is obtained by filtering the accumulated phase. A complex signal is produced whose argument represents the modulating phase. Two quadrature radio waveforms are respectively modulated on the basis of that complex signal, and a radio signal resulting from a combination of the two modulated waveforms is transmitted. The complex signal may be filtered digitally. Its real and imaginary components are converted into analog form, and are subjected to anti-aliasing analog filtering and then mixed with the two radio waveforms. Appropriate sizing of the digital filters provides efficient modulation with small envelope variations, causing little adjacent channel interference and a low error rate.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: October 1, 2002
    Assignee: EADS Defence and Security Networks
    Inventors: Gérard Marque-Pucheu, Albert Roseiro
  • Patent number: D466489
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: December 3, 2002
    Assignee: EADS Defence and Security Networks
    Inventor: Marc Renard