Patents Assigned to Eastern Japan Semiconductor Technologies
  • Semiconductor device, and method and apparatus for manufacturing semiconductor device
    Patent number: 7262480
    Abstract: A high frequency power amplifying device has two amplifying lines. Each amplifying line has a configuration in which a plurality of amplifying stages are connected in cascade having two source voltage terminals, of which one is connected to the first amplifying stage of one amplifying line and to the remaining amplifying stages of the other amplifying line, and the other, to the first amplifying stage of the latter amplifying line and to the remaining amplifying stages of the former amplifying line. An air core coil with a low D.C. resistance, formed by spirally winding a copper wire of about 0.1 mm in diameter, is connected in series between the final amplifying stage of each amplifying line and the source voltage terminal.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: August 28, 2007
    Assignees: Hitachi, Ltd., Eastern Japan Semiconductor Technologies, Akita Electronics Co., Ltd.
    Inventors: Toshihiko Kyogoku, Tadashi Kodu, Kiyoharu Mochiduki, Sakae Kikuchi, Akio Ishidu, Yoshihiko Kobayashi, Masashi Maruyama, Iwamichi Kojiro, Susumu Sato
  • Fabrication method of semiconductor integrated circuit device
    Patent number: 7144755
    Abstract: At the time of performing resin molding for a matrix frame in the fabrication of semiconductor integrated circuit devices, a predetermined amount of air is fed into each of first cavities in a first row and second cavities in a second row, the first and second cavities being formed in a matrix arrangement in a lower mold of a molding die, so as to pressurize the interiors of the cavities, and a sealing resin is charged into the cavities, while the pressure therein is regulated in such a manner that the charging speeds of the sealing resin become equal in all of the cavities, whereby it is possible to stabilize the quality of the product being obtained.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: December 5, 2006
    Assignees: Renesas Technology Corp., Eastern Japan Semiconductor Technologies, Inc.
    Inventors: Bunshi Kuratomi, Fukumi Shimizu, Kenichi Imura, Katsushige Namiki, Fumio Murakami
  • Fabrication method of semiconductor integrated circuit device
    Patent number: 6797542
    Abstract: At the time of performing resin molding for a matrix frame in the fabrication of semiconductor integrated circuit devices, a predetermined amount of air is fed into each of first cavities in a first row and second cavities in a second row, the first and second cavities being formed in a matrix arrangement in a lower mold of a molding die, so as to pressurize the interiors of the cavities, and a sealing resin is charged into the cavities, while the pressure therein is regulated in such a manner that the charging speeds of the sealing resin become equal in all of the cavities, whereby it is possible to stabilize the quality of the product being obtained.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: September 28, 2004
    Assignees: Renesas Technology Corp., Eastern Japan Semiconductor Technologies, Inc.
    Inventors: Bunshi Kuratomi, Fukumi Shimizu, Kenichi Imura, Katsushige Namiki, Fumio Murakami