Abstract: An event-driven tracking analog to digital converter (ADC) architecture is proposed. The proposed architecture has less sensitivity to amplifier and DAC non-linearity, reduces the swing and dynamic common-mode range requirement of the operational transconductance amplifier (OTA) and comparators, respectively.
Type:
Grant
Filed:
September 28, 2012
Date of Patent:
December 1, 2015
Assignee:
ECOLE POLYTECHIQUE FEDERALE DE LAUSANNE (EPFL)
Inventors:
Vahid Majidzadeh Bafar, Alexandre Schmid, Yusuf Leblebici