Abstract: A lightweight photovoltaic module including: a first transparent layer forming the front face; photovoltaic cells; an assembly encapsulating the photovoltaic cells; and a second layer forming the rear face and containing an inner surface and an outer surface. The encapsulating assembly and the photovoltaic cells are located between the first and second layers. The module is characterized in that: the first layer is made from glass and/or polymer material and has a thickness that is less than or equal to 1.1 mm; the inner surface is substantially planar; and the second layer includes raised portions projecting from the outer surface, the outer surface and raised portions together defining the visible rear outer surface of the photovoltaic module.

Abstract: A lightweight photovoltaic module including: a first transparent layer forming the front face; photovoltaic cells; an assembly encapsulating the photovoltaic cells; and a second layer forming the rear face and containing an inner surface and an outer surface. The encapsulating assembly and the photovoltaic cells are located between the first and second layers. The module is characterized in that: the first layer is made from glass and/or polymer material and has a thickness that is less than or equal to 1.1 mm; the inner surface is substantially planar; and the second layer includes raised portions projecting from the outer surface, the outer surface and raised portions together defining the visible rear outer surface of the photovoltaic module.

Abstract: The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (1), which includes a front surface (8) and a rear surface (9), a layer of boron-doped silicon oxide (BSG) (2) is formed on the rear surface (9) by PECVD, followed by a SiOx diffusion barrier (3); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface (8) of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) (4) and an n+ doped area (5); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (6), as well as a p+ doped area (7); c) the layers of BSG (2) and PSG (4) oxides and SiOx (3) are removed, the BRL (6) is oxidized and the layer resulting from said oxidation is removed.