Patents Assigned to EIC Corporation
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Patent number: 6806513Abstract: The safe operating area (SOA) in a heterojunction bipolar transistor is improved by inserting a material between the collector and subcollector of the transistor with the insertion layer being a material having a wider energy bandgap than the material of the collector. The insertion layer increases the breakdown field at the collector-subcollector junction and thereby increases the Kirk effect induced breakdown voltage.Type: GrantFiled: October 8, 2002Date of Patent: October 19, 2004Assignee: EIC CorporationInventors: Hin Fai Chau, Clarence John Dunnrowicz, Yan Chen, Chien Ping Lee
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Publication number: 20040188712Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (continuous or stepped) doping between the base region and the underlying subcollector region with the collector doping being lowest near the base and highest near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.Type: ApplicationFiled: April 7, 2004Publication date: September 30, 2004Applicant: EiC CorporationInventors: Chien Ping Lee, Frank Hin Fai Chau, Nanlei Larry Wang, Clarence John Dunnrowicz, Yan Chen, Barry Jia-Fu Lin
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Publication number: 20040065897Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (uniformly or stepped) doping between the base region and the underlying subcollector region with the collector doping being lower near the base and higher near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.Type: ApplicationFiled: October 8, 2002Publication date: April 8, 2004Applicant: EiC CorporationInventors: Chien Ping Lee, Hin Fai Chau, Nanlei Larry Wang, Clarence John Dunnrowicz, Yan Chen, Barry Jia-Fu Lin
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Publication number: 20040065898Abstract: The safe operating area (SOA) in a heterojunction bipolar transistor is improved by inserting a material between the collector and subcollector of the transistor with the insertion layer being a material having a wider energy bandgap than the material of the collector. The insertion layer increases the breakdown field at the collector-subcollector junction and thereby increases the Kirk effect induced breakdown voltage.Type: ApplicationFiled: October 8, 2002Publication date: April 8, 2004Applicant: EiC CorporationInventors: Hin Fai Chau, Clarence John Dunnrowicz, Yan Chen, Chien Ping Lee
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Patent number: 6700076Abstract: An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are selectively interconnected by drilling via holes completely through all dielectric layers with a conductive material such as solder in each via contacting metal layers to be interconnected and each metal layer which is not connected by a via having a metal pattern devoid of metal at the via location. For via connecting non-ground layers, there will be a patch of solder mask on the backside ground layer to electrically prevent this via from inadvertently connecting to ground.Type: GrantFiled: February 1, 2002Date of Patent: March 2, 2004Assignee: EIC CorporationInventors: Xiao-Peng Sun, Nanlei Larry Wang
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Patent number: 6556082Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.Type: GrantFiled: October 12, 2001Date of Patent: April 29, 2003Assignee: EiC CorporationInventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
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Publication number: 20030071688Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.Type: ApplicationFiled: October 12, 2001Publication date: April 17, 2003Applicant: EiC CorporationInventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
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Patent number: 6522201Abstract: Efficiency of an RF/microwave power amplifier is increased at a back-off power level by increasing the load resistance of the amplifier at the reduced output power level as compared to load impedance at a higher power level including full operating power. The different load impedances can be realized with two amplification units in parallel each having different load impedances. Alternatively, a single amplification path can be provided with an output impedance matching network which is selectively bypassed for increased impedance load during back-off power operation. In another embodiment, the output impedance matching network can include a shunt inductance which is selectively switched into the network to increase impedance for back-off power operation.Type: GrantFiled: September 28, 2000Date of Patent: February 18, 2003Assignee: EiC CorporationInventors: Shuo-Yuan Hsiao, Wei-Shu Zhou, Nanlei Y Larry Wang
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Patent number: 6521972Abstract: An RF microwave power transistor has an input/output feed structure which functions as a low impedance microstrip line by providing a ground plane in close proximity to the feed structure on one surface of a semiconductor body. A second ground plane can be provided on an opposing surface of the semiconductor body with vias interconnecting the first and second ground planes. In addition to reducing feed impedance, a larger total transistor size can be provided before “odd mode oscillation” occurs.Type: GrantFiled: September 28, 2000Date of Patent: February 18, 2003Assignee: EiC CorporationInventors: Wei-Shu Zhou, Shuo-Yuan Hsiao, Nanlei Larry Wang
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Publication number: 20020105083Abstract: An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are selectively interconnected by drilling via holes completely through all dielectric layers with a conductive material such as solder in each via contacting metal layers to be interconnected and each metal layer which is not connected by a via having a metal pattern devoid of metal at the via location. For via connecting non-ground layers, there will be a patch of solder mask on the backside ground layer to electrically prevent this via from inadvertently connecting to ground.Type: ApplicationFiled: February 1, 2002Publication date: August 8, 2002Applicant: EiC CorporationInventors: Xiao-Peng Sun, Nanlei Larry Wang
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Publication number: 20020097094Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.Type: ApplicationFiled: January 19, 2001Publication date: July 25, 2002Applicant: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Xiao-Peng Sun
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Patent number: 6424223Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.Type: GrantFiled: January 19, 2001Date of Patent: July 23, 2002Assignee: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Xiao-Peng Sun
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Patent number: 6326849Abstract: In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.Type: GrantFiled: September 28, 2000Date of Patent: December 4, 2001Assignee: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Wei-Shu Zhou, Shihui Xu
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Patent number: 4362794Abstract: Compound having the formula MZSX.sub.2, wherein M is an alkali metal, Z is selected from the group consisting of boron, aluminum, gallium, indium, and thallium, and X is a halogen.Type: GrantFiled: October 2, 1980Date of Patent: December 7, 1982Assignee: EIC CorporationInventor: Kuzhikalail M. Abraham
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Patent number: 4298584Abstract: Process for removing carbon oxysulfide from a gas stream including contacting the gas stream with a scrubbing solution containing copper sulfate buffered to an acidic pH and removing at least some of the copper sulfides produced.Type: GrantFiled: June 5, 1980Date of Patent: November 3, 1981Assignee: EIC CorporationInventor: Alkis C. Makrides
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Patent number: 4252876Abstract: An electrolyte for a rechargeable electrochemical cell featuring diethylether, a cosolvent, and a lithium salt.Type: GrantFiled: July 2, 1979Date of Patent: February 24, 1981Assignee: EIC CorporationInventor: Victor R. Koch
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Patent number: 4192854Abstract: A process is described for the simultaneous removal of H.sub.2 S and ammonia from gaseous streams containing other acid and basic gases. The process comprises closed loop scrubbing of the gaseous stream with a copper sulfate-ammonium sulfate solution to yield a copper sulfide precipitate, concurrent neutralization of the acidity generated in the scrubbing step by addition or scrubbing of ammonia and other basic gases, separating the precipitate, hydrothermally leaching the precipitate with oxygen or air under controlled temperature and pressure to reoxidize the sulfide to copper sulfate, recycling the copper sulfate to the scrubber, and rejecting sulfur from the system in the form of (NH.sub.4).sub.2 SO.sub.4.Type: GrantFiled: March 13, 1978Date of Patent: March 11, 1980Assignee: EIC CorporationInventors: Walter W. Harvey, Alkis C. Makrides
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Patent number: 4127703Abstract: Storage battery with multi-cell arrays comprising in each cell a positive nickel electrode (cathode) spaced from a hydrogen containing negative electrode (anode) and alkaline electrolyte medium extending between the electrodes and further comprising a reservoir outside the space defined between electrodes to provide buffer storage of electrolyte displaced by gases generated in the course of cell operation, particularly during overcharging, one or more hydrophobic, microporous membranes to prevent electrolyte loss by entrainment in such evolved gases, and an arrangement of cell construction to provide recombination of free oxygen with hydrogen under safe conditions.Type: GrantFiled: April 10, 1978Date of Patent: November 28, 1978Assignee: EIC CorporationInventor: Gerhard L. Holleck
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Patent number: 4118550Abstract: The invention comprises using selected alkylated analogs of tetrahydrofuran and tetrahydropyran as solvents for electrolytes in batteries having alkali metal negative electrodes.Type: GrantFiled: September 26, 1977Date of Patent: October 3, 1978Assignee: EIC CorporationInventor: Victor R. Koch