Abstract: An arc suppression circuit for a switch carrying a load current includes a MOSFET having a drain connected to a first contact of the switch and a source connected to a second contact of the switch. A biasing capacitor is coupled at one end to the drain and at another end through a damping resistor to the gate, such that when the switch contacts are opened, the interrupted load current passes through the biasing capacitor to charge an inherent gate-to-source MOSFET capacitance for turning on the MOSFET and shunting the load current around the switch. A biasing resistor, connected between the gate and the source of the MOSFET, subsequently discharges the gate-to-source capacitance, turning off the MOSFET and terminating the shunted load current after the contacts of the switch have separated by a distance sufficient to preclude arcing.