Patents Assigned to Electron Power Inc.
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Patent number: 11411339Abstract: An apparatus for modifying an electrical circuit includes a first electrical contact, a second electrical contact, an electrical coupler formed of an electrically conductive material, a first assembly including a cavity, a driving portion, an inhibiting portion, and a second assembly electrically coupled to the second electrical contact. The electrical coupler is moveable within the cavity along a movement axis, a wall of the cavity is electrically coupled to the first electrical contact and to the electrical coupler, and when the electrical coupler is disposed at an initial position within the cavity, the electrical coupler is not electrically coupled to the second electrical contact. The driving portion applies a first force on the electrical coupler in a movement direction along the movement axis. The inhibiting portion inhibits the movement of the electrical coupler along the movement axis.Type: GrantFiled: August 13, 2020Date of Patent: August 9, 2022Assignee: R.S.M. Electron Power, Inc.Inventors: David Peng, Ching Au
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Patent number: 10879211Abstract: A method of joining a surface-mount component to a substrate includes placing a piece of solder on top of the substrate and temporarily bonding the piece of solder to the substrate with at least one temporary bond. The method also includes placing a surface-mount component on top of the substrate with a bottom face of the surface-mount component facing the substrate. The surface-mount component has at least one lateral side. The method further includes positioning the surface-mount component with the at least one lateral side proximate the piece of solder, heating the substrate and the piece of solder to a joining temperature for a time sufficient for the solder to flow into an area between the bottom face of the surface-mount component and the substrate, and cooling the substrate and solder.Type: GrantFiled: December 8, 2016Date of Patent: December 29, 2020Assignee: R.S.M. Electron Power, Inc.Inventors: Robert Conte, Dennis Zegzula, Ching Au
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Patent number: 9648750Abstract: A flexible circuit board includes an electrically insulating top sheet and an electrically insulating bottom sheet. A plurality of conductive traces is positioned between the electrically insulating top and bottom sheets. A first conductive trace has a first contact pad, and a second conductive trace has a second contact pad. The first and second contact pads are exposed through at least one opening in the electrically insulating top sheet, and each of the first and second contact pads are configured to be connected to an LED. A third contact pad is exposed through openings in the electrically insulating top and bottom sheets, with a top surface of the third contact pad configured to be connected to the LED and a bottom surface of the third contact pad configured to be connected to a heat diffusion device.Type: GrantFiled: October 9, 2014Date of Patent: May 9, 2017Assignee: RSM Electron Power, Inc.Inventor: Ching Au
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Patent number: 9558859Abstract: The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.Type: GrantFiled: February 18, 2014Date of Patent: January 31, 2017Assignee: RSM ELECTRON POWER, INC.Inventors: Ching Au, Manhong Zhao, Robert Conte
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Patent number: 9392713Abstract: A hermetically sealed package has an electrically insulating substrate, a plurality of electrically and thermally conductive tabs, and a lid. The electrically insulating substrate has a plurality of apertures and an aspect ratio of about 10:1 or greater. The plurality of electrically and thermally conductive tabs is hermetically joined to a bottom surface of the electrically insulating substrate and at least one tab covers each of the apertures. The lid is hermetically joined to a top surface of the electrically insulating substrate proximate to a perimeter of the electrically insulating substrate.Type: GrantFiled: December 17, 2014Date of Patent: July 12, 2016Assignee: RSM Electron Power, Inc.Inventors: Ching Au, Dennis Zegzula, David Peng
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Publication number: 20150237724Abstract: The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.Type: ApplicationFiled: February 18, 2014Publication date: August 20, 2015Applicant: RSM Electron Power, Inc.Inventors: Ching Au, Manhong Zhao, Robert Conte
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Patent number: 8734657Abstract: A method for making a liquid barrier includes forming a liquid barrier layer on a substrate, forming a mask layer on the liquid barrier layer such that part of the liquid barrier remains exposed, forming a contact layer on the exposed liquid barrier layer, and removing the mask layer to expose the part of the liquid barrier layer which was covered by the mask layer. A liquid wetting boundary is formed when the wettability on the liquid barrier surface area is less than the wettability of the contact surface area.Type: GrantFiled: February 19, 2010Date of Patent: May 27, 2014Assignee: R.S.M. Electron Power, Inc.Inventors: Ching Au, Krithika Kalyanasundaram
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Publication number: 20110206912Abstract: A method for making a liquid barrier includes forming a liquid barrier layer on a substrate, forming a mask layer on the liquid barrier layer such that part of the liquid barrier remains exposed, forming a contact layer on the exposed liquid barrier layer, and removing the mask layer to expose the part of the liquid barrier layer which was covered by the mask layer. A liquid wetting boundary is formed when the wettability on the liquid barrier surface area is less than the wettability of the contact surface area.Type: ApplicationFiled: February 19, 2010Publication date: August 25, 2011Applicant: RSM ELECTRON POWER, INC.Inventors: Ching Au, Krithika Kalyanasundaram
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Patent number: 6950322Abstract: In high-efficiency power source applications, AC power is converted to DC power, which is isolated from the source and regulated. A level of performance is achieved that exceeds the power quality requirements of MIL-STD-704 over the extended frequency range, typically from about 360 Hz to 800 Hz. While high-efficiency and low-weight of the invention, among other benefits, are advantageous primarily in airborne systems, its use can be extended to terrestrial applications as well. The isolation, regulation and the main power processing are achieved by low-weight, high-frequency conversion stages arranged in 2 channels that produce the line harmonic content typical of the 12-pulse rectification. Control of the conversion stages provides effective rejection of line transients, while output ripple voltage is typically an order of magnitude lower than in conventional transformer rectifier units.Type: GrantFiled: April 10, 2003Date of Patent: September 27, 2005Assignee: RSM Electron Power, Inc.Inventor: Jerzy Ferens
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Patent number: 5200640Abstract: The invention relates to the hermetic packaging of typically one or two dice for high power density applications. The package, which is intended for surface mounting to a heating sinking substrate, is particularly compact. Compactness in surface mount applications is measured as a minimum ratio of package area to die area. In accordance with the invention, compactness is achieved by using a novel vertically developed design in which the electrical connections lie within vertical extensions of the die boundaries giving a package to die ratio of less than 2 to 1.Type: GrantFiled: August 12, 1991Date of Patent: April 6, 1993Assignees: Electron Power Inc., General Electric CompanyInventors: David J. Scheftic, William A. Peterson, John E. Escallier, Hanna E. Rykowska
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Patent number: D803795Type: GrantFiled: August 9, 2016Date of Patent: November 28, 2017Assignee: RSM Electron Power, Inc.Inventors: Ching Au, David Peng, Dennis Zegzula
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Patent number: D803796Type: GrantFiled: August 9, 2016Date of Patent: November 28, 2017Assignee: RSM Electron Power, Inc.Inventors: Ching Au, David Peng, Dennis Zegzula
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Patent number: D803797Type: GrantFiled: August 9, 2016Date of Patent: November 28, 2017Assignee: RSM Electron Power, Inc.Inventors: Ching Au, David Peng, Dennis Zegzula
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Patent number: D803798Type: GrantFiled: August 9, 2016Date of Patent: November 28, 2017Assignee: RSM Electron Power, Inc.Inventors: Ching Au, David Peng, Dennis Zegzula