Abstract: An electron beam exposure method is described which provides a means of curing spin-on-glass or spin-on-polymer dielectric material formed on a semiconductor wafer. The dielectric material insulates the conductive metal layer and planarizes the topography in the process of manufacturing multilayered integrated circuits. The method utilizes a large area, uniform electron beam exposure system in a soft vacuum environment. A wafer coated with uncured dielectric material is irradiated with electrons of sufficient energy to penetrate the entire thickness of the dielectric material and is simultaneously heated by infrared heaters. By adjusting the process conditions, such as electron beam total dose and energy, temperature of the wafer, and ambient atmosphere, the properties of the cured dielectric material can be modified.

Abstract: A process for the formation of structures in microelectronic devices such as integrated circuit devices wherein a patterned layer of a metal, alloy, nitride or silicide is subjected to a low temperature, wide beam electron beam annealing. The process involves depositing a silicide, nitride, metal, or metal alloy layer onto a substrate; and then overall flood exposing said entire layer to electron beam radiation under conditions sufficient to anneal the layer.

Abstract: A treated substrate produced by a process for treating a dielectric layer on a substrate, which comprises applying a sufficient amount of a liquid dielectric composition onto an upper surface of a semiconductor substrate to thereby form a dielectric layer on the upper surface of the substrate, the dielectric layer having a thickness of from about 2,000 to about 50,000 angstroms; heating a surface of the dielectric layer and exposing the dielectric layer to an electron beam radiation, in which the electron beam radiation is concentrated at a distance within about 1,000 angstroms from the surface of the dielectric layer, under vacuum conditions to remove substantially all moisture and/or contaminants from the surface of the dielectric layer at a depth of up to about 1,000 angstroms from the surface of the dielectric layer; and chemical vapor depositing a chemical vapor deposit material onto the surface of the treated dielectric layer while maintaining the vacuum conditions.

Abstract: An improved dopant application system and method for the manufacture of microelectronic devices accurately places dopant on and within a dielectric or semiconductor surface. Diffusing and activating p-type and n-type dopants in dielectric or semiconductor substrates is achieved by means of electron beam irradiation.

Abstract: The invention pertains to dielectric films for the production of microelectronic devices. A spin-on glass film is produced by depositing a silazane polymer containing composition film onto a substrate and then exposing the film to electron beam radiation. The electron beam exposing step is conducted by overall exposing the dielectric layer with a wide, large beam of electron beam radiation from a large-area electron beam source.

Abstract: The invention pertains to electron exposure equipment useful for exposing, treating and processing coatings and other materials by a cold cathode gas discharge electron source having a broad uniform emitting area. The apparatus has a vacuum chamber; a large surface area cathode in the vacuum chamber and means for applying a negative voltage to the cathode and causing the cathode to issue electrons toward a target in the vacuum chamber. An anode is positioned between the cathode and the target. The anode is formed of an electrically conductive grid having an array of apertures therethrough extending from a center of the grid to an edge of the grid. In one embodiment the apertures have a progressively increasing area from the center of the grid to the edge of the grid. In another embodiment the anode has a progressively decreasing thickness from the center of the grid to the edge of the grid.

Abstract: A process for increasing the etch resistance of the upper surface of photoresists by a surface-intensive dose of electron beam radiation. Such imparts increased surface etch resistance to the photoresist without causing as much shrinkage in the bulk of the film. A photographic image is produced by imagewise exposing a photographic composition layer on a substrate to activating energy to produce a latent pattern on the layer. This is followed by developing the photographic layer to thereby remove the nonimage areas thereof and leaving the image areas thereof in the form of a pattern on the substrate. The imaged layer is then overall irradiated to electron beam radiation for the full depth of the layer and then overall irradiated to electron beam radiation one or more additional times at a depth which is less than the full depth of the layer.

Abstract: A process for decreasing the linewidth of photoresist images which are suitable for use in the production of microelectronic devices such as integrated circuits. A photosensitive composition is coated onto a substrate, exposed to activating energy to decompose the polymer in the imagewise exposed areas; and developed to remove the exposed nonimage areas thus producing a pattern of lines having a linewidth of from about 100 nm to about 200 nm. Then the image areas are controllably irradiated to sufficient electron beam radiation to thereby reduce the linewidth by an amount of from about 5% to about 50%.

Abstract: A process for increasing the etch resistance of photoresists, especially positive working 193 nm sensitive photoresists which are suitable for use in the production of microelectronic devices such as integrated circuits. A 193 nm photosensitive composition is coated onto a substrate, exposed to activating energy at a wavelength of 193 nm to decompose the polymer in the imagewise exposed areas; and developed to remove the exposed nonimage areas. Then the image areas are exposed to sufficient electron beam radiation to increase the resistance of the image areas to an etchant.

Abstract: The invention pertains to dielectric films for the production of microelectronic devices. A relatively stabile fluorinated silicate glass film is produced by depositing a fluorinated silicate glass film onto a substrate and then exposing the fluorinated silicate glass film to electron beam radiation. The electron beam exposing step is conducted by overall exposing the dielectric layer with a wide, large beam of electron beam radiation from a large-area electron beam source.

Abstract: A process for forming T-shaped metal contacts on a dielectric substrate. The process includes deposition of first and second photoresist layers onto a substrate; individually overall electron beam exposure of both layers; with subsequent imagewise UV exposure and development of both layers to form hollow cavities in the layers. By concentrating the electron beam radiation on the mid-point in the thickness of each photoresist layer, the radiation is distributed throughout each layer, resulting in solubility properties which lead to the formation of hollow cavities of a certain desired shape. In one embodiment of the invention, three-dimensional structures are formed in the photoresist layers by filling the hollow cavities with metal. Subsequent removal of unwanted portions of the photoresist layers produces a dielectric substrate having T-shaped metal contacts on its surface.

Abstract: A process for forming a photoresist image on a substrate and a process for forming metal contacts on a substrate are described. The process of forming a photoresist image includes depositing a positive working photoresist composition onto a metal layer which is on a substrate to thereby form a photoresist layer then imagewise exposing the photoresist layer to actinic radiation and developing said photoresist layer to form a plurality of cavities through the photoresist layer thereby revealing portions of the metal layer. Then the inventions provides for etching away the revealed portions of the metal layer followed by an overall exposing both the substrate and the remaining photoresist layer and remaining metal layer portions to sufficient electron beam radiation to render a part of the photoresist layer directly adjacent to the metal layer more soluble in a developer than the balance of the photoresist layer.

Abstract: A process for the formation of structures in microelectronic devices such as integrated circuit devices. Vias, interconnect metallization and wiring lines are formed using single and dual damascene techniques wherein dielectric layers are treated with a wide electron beam exposure.

Abstract: A process for the treatment of the surface of dielectric films to remove moisture and other contaminants. Such treatment is done by electron beam exposure in order to prepare the surface for a subsequent chemical vapor deposition of oxide, nitride or oxynitride layers. The films are useful in the manufacture of integrated circuits.

Abstract: An electrostatic holding device for holding semiconductor wafers and similar materials during microelectronic device manufacturing operations. It has a circular, electrically conductive wafer support having a rounded periphery; an annular border region; and a flat, concentric, raised, central plateau having an electrically conductive top surface. The plateau has a tapered circumferential edge which extends down to the annular border region. A nonelectrically conductive coating is on the rounded periphery, the border region and the tapered edge which extends to, but does not cover, the conductive top surface of the central plateau such that an the coating is coplanar with the conductive top surface of the central plateau. A removable dielectric sheet overlies the top surface of the central plateau, the coating on the tapered edge and the coating on the border region.

Abstract: An electron beam exposure method is described which provides a means of curing spin-on-glass formed on a semiconductor wafer which insulates the conductive metal layer and planarizes the topography in the process of manufacturing multilayered integrated circuits. The method utilizes a large area, uniform electron beam exposure system in a soft vacuum environment. A wafer coated with uncured siloxane spin-on-glass is irradiated with electrons of sufficient energy to penetrate the entire thickness of the spin-on-glass and is simultaneously heated by infrared heaters. The wafer is exposed to a predetermined dose of electrons while simultaneously raised to a peak temperature in a soft vacuum environment. The electron beam and infrared heaters are then extinguished and the substrate cooled before removing from vacuum.

Abstract: An electron beam exposure method for controlling the solubility of resist layers used in a variety of lithography processes, to permit removal of the resist material from selected positions and depths in the resist. By controlling the energy of a uniform electron beam impinging on the resist, the method selects a resist depth for applying a dose of electrons, the effect of which is to change the solubility properties of the resist material at the selected positions and depths. Subsequent removal of unwanted portions of the resist produces desired resist wall slope and edge profiles in the developed patterns in photoresist. One embodiment of the invention uses the same basic method to produce three-dimensional structures in the resist material, including bridge-like structures in which lower layers are removed from beneath intact upper layers.

Abstract: A large-area electron source which can operate continuously, stably, and indefinitely in a poor vacuum environment. The source includes a glow discharge cathode, appropriately positioned with respect to a target anode, and a fine-mesh grid spaced from the cathode by a distance less than the mean free path length of electrons leaving the cathode, the grid being electrically biased to control the electron beam current over a wide range with only small grid voltage changes. An accelerating voltage applied to the cathode can be varied continuously from as low as a few hundred volts to 30 KeV or greater and the source will continue to operate satisfactorily. Further, the grid is made of a fine mesh wire of sufficiently small dimensions as to not be resolvable in the target plane. A further refinement of the device utilizes scanning coils to achieve additional uniformity of the incident beam at the target plane.