Patents Assigned to Electronic Polymers, Inc.
  • Patent number: 8045312
    Abstract: In one embodiment, there is provided a printed circuit board including a first rigid circuit board layer having a first signal trace arrayed on it, a second rigid circuit board layer having a second signal trace arrayed on it, a first signal path coupled between the first signal trace and the second signal trace, an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device having a first electrode coupled to the first signal path, an electrostatic discharge reactance layer coupled to the first electrode, and a second electrode coupled to the electrostatic discharge layer but not coupled to the first signal path. The circuit board also having a ground plane, where the ground plane is coupled to the second electrode.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: October 25, 2011
    Assignee: Electronic Polymers, Inc.
    Inventor: Karen P. Shrier
  • Publication number: 20090313819
    Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.
    Type: Application
    Filed: June 22, 2009
    Publication date: December 24, 2009
    Applicant: Electronic Polymers,Inc.
    Inventor: Karen P. Shrier
  • Publication number: 20090237855
    Abstract: In one embodiment, there is provided a printed circuit board including a first rigid circuit board layer having a first signal trace arrayed on it, a second rigid circuit board layer having a second signal trace arrayed on it, a first signal path coupled between the first signal trace and the second signal trace, an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device having a first electrode coupled to the first signal path, an electrostatic discharge reactance layer coupled to the first electrode, and a second electrode coupled to the electrostatic discharge layer but not coupled to the first signal path. The circuit board also having a ground plane, where the ground plane is coupled to the second electrode.
    Type: Application
    Filed: June 3, 2009
    Publication date: September 24, 2009
    Applicant: Electronic Polymers, Inc.
    Inventor: Karen P. Shrier
  • Patent number: 7417194
    Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: August 26, 2008
    Assignee: Electronic Polymers, Inc.
    Inventor: Karen P. Shrier
  • Patent number: 7218492
    Abstract: A device (10) for suppressing electrostatic discharge comprises first and second multilayer structures (14, 16) surrounding an electrostatic discharge reactance layer (12), the resistance of said electrostatic discharge reactance layer (12) varying in response to the occurrence of an electrostatic discharge signal. Each multilayer structure (14, 16) comprises a barrier layer (18), a terminal layer (20) and an electrode layer (28). Alternatively, a conductive layer (80) can be used instead of a second multilayer structure (16). An ESD suppression device (110) can be embedded in a printed circuit board (122, 210) providing a way to protect board components from harmful ESD events.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: May 15, 2007
    Assignee: Electronic Polymers, Inc.
    Inventor: Karen Pamelia Shrier