Patents Assigned to Electronic Polymers, Inc.
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Publication number: 20110302777Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A layered structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.Type: ApplicationFiled: August 18, 2011Publication date: December 15, 2011Applicant: ELECTRONIC POLYMERS, INC.Inventor: Karen Shrier
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Patent number: 8045312Abstract: In one embodiment, there is provided a printed circuit board including a first rigid circuit board layer having a first signal trace arrayed on it, a second rigid circuit board layer having a second signal trace arrayed on it, a first signal path coupled between the first signal trace and the second signal trace, an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device having a first electrode coupled to the first signal path, an electrostatic discharge reactance layer coupled to the first electrode, and a second electrode coupled to the electrostatic discharge layer but not coupled to the first signal path. The circuit board also having a ground plane, where the ground plane is coupled to the second electrode.Type: GrantFiled: June 3, 2009Date of Patent: October 25, 2011Assignee: Electronic Polymers, Inc.Inventor: Karen P. Shrier
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Publication number: 20090237855Abstract: In one embodiment, there is provided a printed circuit board including a first rigid circuit board layer having a first signal trace arrayed on it, a second rigid circuit board layer having a second signal trace arrayed on it, a first signal path coupled between the first signal trace and the second signal trace, an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device having a first electrode coupled to the first signal path, an electrostatic discharge reactance layer coupled to the first electrode, and a second electrode coupled to the electrostatic discharge layer but not coupled to the first signal path. The circuit board also having a ground plane, where the ground plane is coupled to the second electrode.Type: ApplicationFiled: June 3, 2009Publication date: September 24, 2009Applicant: Electronic Polymers, Inc.Inventor: Karen P. Shrier
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Patent number: 7417194Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.Type: GrantFiled: June 24, 2004Date of Patent: August 26, 2008Assignee: Electronic Polymers, Inc.Inventor: Karen P. Shrier
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Publication number: 20070127175Abstract: A electrostatic discharge suppression device including an electrostatic discharge reactance layer having a first side and a second side, a first electrode coupled to the first side and comprising a first extension projecting towards a first distal end of the device, and a second electrode coupled to the second side and including a second extension projecting towards a second end of the device, such that the first extension and the second extension overlap to form an electrode overlap area, wherein during an electrostatic discharge event, an electric current is passed between the first and second extensions through the electrostatic discharge layer in the electrode overlap area.Type: ApplicationFiled: February 8, 2007Publication date: June 7, 2007Applicant: ELECTRONIC POLYMERS, INC.Inventor: Karen Shrier
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Patent number: 7218492Abstract: A device (10) for suppressing electrostatic discharge comprises first and second multilayer structures (14, 16) surrounding an electrostatic discharge reactance layer (12), the resistance of said electrostatic discharge reactance layer (12) varying in response to the occurrence of an electrostatic discharge signal. Each multilayer structure (14, 16) comprises a barrier layer (18), a terminal layer (20) and an electrode layer (28). Alternatively, a conductive layer (80) can be used instead of a second multilayer structure (16). An ESD suppression device (110) can be embedded in a printed circuit board (122, 210) providing a way to protect board components from harmful ESD events.Type: GrantFiled: September 17, 2004Date of Patent: May 15, 2007Assignee: Electronic Polymers, Inc.Inventor: Karen Pamelia Shrier