Patents Assigned to Electronics and Telecommunications Reearch Institute
  • Patent number: 10636761
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: April 28, 2020
    Assignee: Electronics and Telecommunications Reearch Institute
    Inventors: Kwang-Seong Choi, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, Ieeseul Jeong, Wagno Alves Braganca Junior
  • Patent number: 9197245
    Abstract: A digital serial-to-parallel converter capable of minimizing a malfunction of a circuit by more stably performing an operation of a D flip flop in implementing a GaAs MMIC digital serial-to-parallel converter and a GaAs MMIC using the same are disclosed. The digital serial-to-parallel converter includes: a converter configured to convert a received clock signal, serial data, and load signal of TTL into a DCFL signal; a plurality of D flip flops configured to transmit the serial data received through the converter to a D flip flop of a next stage by the clock signal received through the converter and output the serial data of the D flip flop of the next stage by the load signal received through the converter; and a plurality of buffers configured to receive the serial data from the plurality of D flip flops to generate and output complementary signals.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: November 24, 2015
    Assignee: Electronics and Telecommunications Reearch Institute
    Inventors: Jin-Cheol Jeong, Dong-Hwan Shin, In-Kwon Ju, In-Bok Yom