Abstract: A power stage control circuit applied to a voltage converter includes a current sensing circuit, a control circuit, and a driving circuit, wherein the voltage converter includes a first switch and a second switch. The current sensing circuit senses a current associated with the first switch, and converts current into a sensing voltage. The control circuit performs multiple first logical operations according to the sensing voltage, a second switch driving signal, a zero crossing detection voltage, a compensation voltage, and a reference voltage, in order to generate a modulation signal and a determination signal, for controlling turn-on and turn-off of the first switch and the second switch and dynamically setting an inductor peak current of an inductor, respectively. The driving circuit performs multiple second logical operations according to the modulation signal and the determination signal in order to generate a first switch driving signal and the second switch driving signal.

Abstract: A device for estimating the temperature of a loudspeaker's voice coil includes a signal generator, a signal adjuster, an adder, and a temperature estimator. The signal generator generates and outputs an amplified signal to a loudspeaker according to a measurement signal and an audio signal, and senses a voltage and a current of the amplified signal to generate and output a sensory output. The signal adjuster generates and outputs an inverted signal according to the audio signal. The adder adds the sensory output and the inverted signal to generate a blended signal. The temperature estimator obtains an estimated resistance value of the loudspeaker's voice coil according to the blended signal, and generates a temperature signal according to the estimated resistance value, wherein the temperature signal indicates an estimated temperature value of the loudspeaker's voice coil. Additionally, a method for estimating the temperature of the loudspeaker voice coil is provided.

Abstract: A signal recovery system includes multiple frequency dividers, multiple signal recovery circuits, and a data signal generating circuit. The multiple frequency dividers perform a frequency dividing operation upon a clock signal and a data strobe signal, respectively, to generate a set of frequency-divided clock signals and a set of frequency-divided data strobe signals. The multiple signal recovery circuits perform a signal recovery operation upon the set of frequency-divided clock signals and the set of frequency-divided data strobe signals, respectively, to generate a recovered clock signal and a recovered data strobe signal. The data signal generating circuit generates a data signal according to the recovered clock signal and the recovered data strobe signal, for indicating whether a rising edge of the data strobe signal is located at a first level or a second level of the clock signal, wherein the first level is higher than the second level.

Abstract: An audio amplifier chip includes an audio amplifier, a current providing circuit, a detection circuit, and a control circuit. The audio amplifier is arranged to drive a speaker, wherein the audio amplifier has multiple differential input terminals, and a direct current (DC) blocking capacitor is coupled to one of the multiple differential input terminals. The current providing circuit is arranged to provide at least one current for charging the DC blocking capacitor. The detection circuit is coupled to a node located between the one of the multiple differential input terminals and the DC blocking capacitor, and is arranged to detect whether an external resistor of the audio amplifier chip exists according to an input voltage from the node, in order to generate a detection result. The control circuit is arranged to determine a start-up time of the audio amplifier according to the detection result.

Abstract: A load detection device includes a signal output circuit, comparison circuit, sensing circuit, detection circuit, logic circuit, and control circuit. The signal output circuit outputs a forced current, and generates a bias signal, a first output signal, a second output signal, and a feedback signal depending on the forced current. The comparison circuit compares the reference signal output with the first and second output signals to generate an accurate comparison output for indicating the load state. The sensing circuit generates a sensing signal according to the feedback signal. The detection circuit generates a rough detection output for indicating the load state according to the sensing signal and the first and second output signals. The logic circuit obtains the load state according to the precise comparison output and the rough detection output. The control circuit enables the signal output circuit, comparison circuit, sensing circuit, and logic circuit.

Abstract: Circuit, method for audio signal processing with excursion estimation compensation, and non-transitory storage medium are provided. The circuit comprises a delay circuit, compensation filter, excursion estimator, peak detector, gain determination circuit, and gain adjustment circuit. The delay circuit is for delaying a digital audio signal to output a delayed digital audio signal. The compensation filter is for generating a compensated digital audio signal according to the digital audio signal for excursion estimation compensation for a speaker type. The excursion estimator is for determining an estimated excursion signal for the speaker type according to the compensated digital audio signal. The gain determination circuit is for generating a gain setting signal according to the estimated excursion signal and a threshold value. The gain adjustment circuit is for generating an adjusted digital audio signal according to the gain setting signal and delayed digital audio signal.

Abstract: A write leveling system includes a frequency divider, a signal processing circuit, and a data control circuit. The frequency divider is arranged to perform a frequency dividing operation upon a clock signal to generate multiple frequency-divided clock signals. The signal processing circuit is arranged to perform signal processing upon a data strobe signal to generate multiple processed data strobe signals. The data control circuit is arranged to generate a data signal according to the multiple frequency-divided clock signals and the multiple processed data strobe signals, for indicating whether a rising edge of the data strobe signal is located at a first level or a second level of the clock signal, wherein the first level is higher than the second level.

Abstract: A charger circuit comprises a constant current charging circuit and a thermal regulation circuit. The constant current charging circuit is configured for generating a charging current, including a charger input terminal for receiving an input voltage, a charge current setting terminal, a charger output terminal for outputting the charging current, a current mirror including a reference current path between the charger input terminal and charge current setting terminal and an output current path between the charger input terminal and charger output terminal, and a feedback amplifier having a positive terminal, a negative terminal for receiving a feedback reference voltage, and a feedback output terminal coupled to the current mirror. The thermal regulation circuit is configured for generating and modulating a thermal regulation voltage with temperature, and outputting the thermal regulation voltage across the positive terminal of the feedback amplifier and the charging current setting terminal.

Abstract: A charge pump device includes a voltage adjustment unit, an output capacitor, a first output unit and a second output unit. The voltage adjustment unit performs voltage pumping or voltage reducing operation on a power supply voltage according to first to fourth control signals, a positive pump voltage and an negative pump voltage to generate a first voltage adjustment output and a second voltage adjustment output at a first node and a second node respectively. The output capacitor has a first output terminal and a second output terminal. When the first output unit is turned on, the first voltage adjustment output charges the output capacitor through the first output unit, so that the first output terminal generates the positive pump voltage. When the second output unit is turned on, the second voltage adjustment output charges the output capacitor through the second output unit, so that the second output terminal generates the negative pump voltage.

Abstract: A voltage level shifter includes a first voltage regulation unit, a second voltage regulation unit, a first latch unit and an output unit. The first voltage regulation unit and the second voltage regulation unit respectively receive first and second input signals and generate first and second adjustment signals respectively. The first latch unit receives the first and second adjustment signals and generates a first latch signal accordingly. The output unit generates an output signal according to the first latch signal, an input voltage and a control signal. A high logic level voltage of the output signal is greater than the respective high logic level voltages of the first input signal and the second input signal. Wherein, the first voltage regulation unit and the second voltage regulation unit are each a capacitively coupled voltage regulation unit and each includes an input capacitor. The input capacitor has no capacitance to ground at one end.

Abstract: A charge pump device includes a voltage adjustment unit, an output capacitor, a first output unit and a second output unit. The voltage adjustment unit performs voltage pumping or voltage reducing operation on a power supply voltage according to first to fourth control signals, a positive pump voltage and an negative pump voltage to generate a first voltage adjustment output and a second voltage adjustment output at a first node and a second node respectively. The output capacitor has a first output terminal and a second output terminal. When the first output unit is turned on, the first voltage adjustment output charges the output capacitor through the first output unit, so that the first output terminal generates the positive pump voltage. When the second output unit is turned on, the second voltage adjustment output charges the output capacitor through the second output unit, so that the second output terminal generates the negative pump voltage.

Abstract: The oscillator includes a reference current generating circuit, a voltage modulator circuit, and an oscillating circuit. The reference current generating circuit is arranged to generate a reference current. The voltage modulator circuit is arranged to receive a feedback voltage, and perform a voltage modulation operation according to a first reference voltage and the feedback voltage, to generate a modulated voltage. The oscillating circuit is coupled to the reference current generating circuit and the voltage modulator circuit, and arranged to generate an oscillation signal with an oscillation frequency according to the reference current and the modulated voltage.

Abstract: A method for enabling a permanent magnet synchronous motor (PMSM) to start in a reverse direction may include: estimating a load torque according to a torque and an actual rotational speed of the PMSM, to generate an estimated load torque; controlling the torque according to the estimated load torque to decelerate the PMSM, until the actual rotational speed of the PMSM is reduced to a predetermined target rotational speed; in response to the actual rotational speed of the PMSM being reduced to the predetermined target rotational speed, determining whether an energy of the PMSM is not greater than a threshold value, wherein the energy of the PMSM comprises a potential energy; and in response to the energy of the PMSM not being greater than the threshold value, starting to control the torque for making the PMSM rotate in a forward direction.

Abstract: The oscillator includes a reference current generating circuit, a voltage modulator circuit, and an oscillating circuit. The reference current generating circuit is arranged to generate a reference current. The voltage modulator circuit is arranged to receive a feedback voltage, and perform a voltage modulation operation according to a first reference voltage and the feedback voltage, to generate a modulated voltage. The oscillating circuit is coupled to the reference current generating circuit and the voltage modulator circuit, and arranged to generate an oscillation signal with an oscillation frequency according to the reference current and the modulated voltage.

Abstract: An active clamp photoelectric sensing device includes an input terminal, a first output terminal, a current-to-voltage conversion circuit, and an active clamp circuit. The input terminal receives an input current. The first output terminal outputs a first output voltage. The current-to-voltage conversion circuit is coupled between the input terminal and the first output terminal, and is used to discharge and lower potentials of the input terminal and the first output terminal to a first set voltage according to the state of a reset signal, or is used to gradually increase the first output voltage to a second set voltage. The active clamping circuit is coupled to the current-to-voltage conversion circuit, and is used to clamp the upper limit of the first output voltage to the second set voltage.

Abstract: A controller applied to a servomotor includes a flash memory, a microcontroller, and a processing circuit. The flash memory is arranged to store a first program code for controlling the servomotor. The microcontroller is arranged to determine whether an alarm of the servomotor occurs, wherein in response to the alarm of the servomotor occurring, the microcontroller is arranged to store an error log corresponding to the alarm in the flash memory. In addition, a second program code is programmed into the processing circuit in advance, wherein the second program code is a copied version of the first program code; and in response to the alarm of the servomotor occurring, the processing circuit is arranged to execute the second program code.

Abstract: A photoelectric sensing device for cancelling crosstalk includes a first capacitor; a first switch, coupled between a current source and the first capacitor, is turned on according to a driving signal, and enables the current source to charge the first capacitor to generate a first capacitor voltage; a second switch, coupled between the first capacitor and an input terminal, is turned on according to a cancellation signal; a current-voltage conversion circuit, coupled to the second switch, receiving an input current corresponding to a crosstalk signal, and generating a crosstalk voltage corresponding to the input current. Wherein, when the second switch is turned on, the crosstalk voltage is subtracted from the first capacitor voltage to cancellate the crosstalk signal, so as to output a correct sensing voltage.

Abstract: An integrated circuit die forming method, for forming a plurality of integrated circuit dies on a semiconductor wafer, comprising: forming a first device, a second device in a first die in a first area; forming a metal layer connected to the first device and the second device; forming a third device, a fourth device in a second die in a second area; forming the metal layer connected to the third device and the fourth device, wherein a scribe area exists between the first area and the second area is separated by; wherein the first device and the third device are used for synchronization and are components of a class D amplifier; wherein the second device is used for preventing leakage currents of the first die and the fourth device is used for preventing leakage currents of the second die.

Abstract: A signal recovery system includes multiple frequency dividers, multiple signal recovery circuits, and a data signal generating circuit. The multiple frequency dividers perform a frequency dividing operation upon a clock signal and a data strobe signal, respectively, to generate a set of frequency-divided clock signals and a set of frequency-divided data strobe signals. The multiple signal recovery circuits perform a signal recovery operation upon the set of frequency-divided clock signals and the set of frequency-divided data strobe signals, respectively, to generate a recovered clock signal and a recovered data strobe signal. The data signal generating circuit generates a data signal according to the recovered clock signal and the recovered data strobe signal, for indicating whether a rising edge of the data strobe signal is located at a first level or a second level of the clock signal, wherein the first level is higher than the second level.

Abstract: A write leveling system includes a frequency divider, a signal processing circuit, and a data control circuit. The frequency divider is arranged to perform a frequency dividing operation upon a clock signal to generate multiple frequency-divided clock signals. The signal processing circuit is arranged to perform signal processing upon a data strobe signal to generate multiple processed data strobe signals. The data control circuit is arranged to generate a data signal according to the multiple frequency-divided clock signals and the multiple processed data strobe signals, for indicating whether a rising edge of the data strobe signal is located at a first level or a second level of the clock signal, wherein the first level is higher than the second level.