Patents Assigned to Elixent Limited
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Patent number: 6946903Abstract: Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.Type: GrantFiled: July 28, 2003Date of Patent: September 20, 2005Assignee: Elixent LimitedInventors: Alan Marshall, Andrea Olgiati, Anthony I. Stansfield
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Patent number: 6820188Abstract: A circuit is provided to provide instruction streams to a processing device: embodiments of the circuit are appropriate for use with RISC CPUs, whereas other embodiments are useable with other processing devices, such as small processing devices used in a field programmable array. The circuit receives an external instruction stream which provides a first set of instruction values, and has a memory which contains a second set of instruction values. Two or more outputs provide instruction streams to the processing device. The circuit has a control input in the form of a mask which causes a selection means to allocate bits from the first and second sets of instruction values to different instruction streams to the processing device.Type: GrantFiled: January 6, 2003Date of Patent: November 16, 2004Assignee: Elixent LimitedInventors: Anthony Stansfield, Alan David Marshall, Jean Vuillemin
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Patent number: 6567834Abstract: Implementation of multipliers in an FPGA or similar device containing an array or other aggregation of small processor devices is a significant difficulty, leading to increased cost as a result of the silicon area consumed thereby.Type: GrantFiled: June 1, 2000Date of Patent: May 20, 2003Assignee: Elixent LimitedInventors: Alan David Marshall, Anthony Stansfield, Jean Vuillemin
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Patent number: 6542394Abstract: An integrated circuit has a field programmable circuit region arranged as a generally rectangular array of rows and columns of circuit areas. Some of the circuit areas each provide a respective processing unit for performing operations on data on at least one respective input signal path to provide data on at least one respective output signal path. Others of the circuit areas each provide a respective switching section; and the processing units and the switching sections are arranged alternately in each row and in each column. Each of a substantial proportion of the switching sections provides a programmable connection between at least some of the signal paths of those of the processing units adjacent that switching section in the same column and in the same row.Type: GrantFiled: June 25, 2001Date of Patent: April 1, 2003Assignee: Elixent LimitedInventors: Alan Marshall, Anthony Stansfield, Jean Vuillemin
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Patent number: 6523107Abstract: A circuit is provided to provide instruction streams to a processing device: embodiments of the circuit are appropriate for use with RISC CPUs, whereas other embodiments are useable with other processing devices, such as small processing devices used in a field programmable array. The circuit receives an external instruction stream which provides a first set of instruction values, and has a memory which contains a second set of instruction values. Two or more outputs provide instruction streams to the processing device. The circuit has a control input in the form of a mask which causes a selection means to allocate bits from the first and second sets of instruction values to different instruction streams to the processing device.Type: GrantFiled: December 11, 1998Date of Patent: February 18, 2003Assignee: Elixent LimitedInventors: Anthony Stansfield, Alan David Marshall, Jean Vuillemin
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Publication number: 20010035772Abstract: An integrated circuit has a field programmable circuit region arranged as a generally rectangular array of rows and columns of circuit areas. Some of the circuit areas each provide a respective processing unit for performing operations on data on at least one respective input signal path to provide data on at least one respective output signal path. Others of the circuit areas each provide a respective switching section; and the processing units and the switching sections are arranged alternately in each row and in each column. Each of a substantial proportion of the switching sections provides a programmable connection between at least some of the signal paths of those of the processing units adjacent that switching section in the same column and in the same row.Type: ApplicationFiled: June 25, 2001Publication date: November 1, 2001Applicant: Elixent LimitedInventors: Alan Marshall, Anthony Stansfield, Jean Vuillemin
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Patent number: 6262908Abstract: A field programmable device comprising an array of processing devices, a connection matrix interconnecting the processing devices and including switches, and memory cells for storing data for controlling the switches to define the configuration of the interconnections of the connection matrix. In order to provide flexible use of memory and to enable higher memory densities, gates are provided which can be used to isolate the effect of the data stored in groups of the memory cells and switches on the configuration of the interconnections so that the memory cells in that group are available for storing other data.Type: GrantFiled: July 13, 1999Date of Patent: July 17, 2001Assignee: Elixent LimitedInventors: Alan Marshall, Anthony Stansfield, Jean Vuillemin
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Patent number: 6252792Abstract: An integrated circuit has a field programmable circuit region arranged as a generally rectangular array of rows and columns of circuit areas. Some of the circuit areas each provide a respective processing unit for performing operations on data on at least one respective input signal path to provide data on at least one respective output signal path. Others of the circuit areas each provide a respective switching section; and the processing units and the switching sections are arranged alternately in each row and in each column. Each of a substantial proportion of the switching sections provides a programmable connection between at least some of the signal paths of those of the processing units adjacent that switching section in the same column and in the same row.Type: GrantFiled: July 13, 1999Date of Patent: June 26, 2001Assignee: Elixent LimitedInventors: Alan Marshall, Anthony Stansfield, Jean Vuillemin