Abstract: A page mapping system for virtual memory that requires only one address to be continually resident in memory per user subspace and permits the size of a process subspace to be varied dynamically. The system provides a tree of page map pages ("PM pages") with only the very root of the tree (a base address entry) being required to be in physical memory. Depending on the size of the space, the page map includes, as well as the base address entry, a number of paged levels with one PM page at the highest level (to which PM page the base address entry points). The page map entries (PMEs) of the first level PM pages point directly to the physical pages. Each PME in a higher level of the page map points to a PM page at a lower level in the page map, whereupon the page map may grow geometrically from the highest level to the first level. The PMEs for pages or PM pages that are not allocated are so marked.

Abstract: A backplane power distribution system characterized by generally uniform current densities so as to be capable of handling very high levels of current. This is achieved with a stepped backplane construction. For example, in a system having, in order, a first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer, the second conductive and dielectric layers extend transversely beyond the first conductive and dielectric layers to present a substantial exposed area of the second conductive layer. Typically, a rectangular metal bus bar is bolted to the backplane to make contact with the exposed area, and power supply connections to the bus bar are made in any convenient manner.

Abstract: A very high speed data bus system for communication among the various functional units that may constitute a large computer system. The bus communication medium comprises a number of line pairs on the backplane, and the bus system comprises a bus control unit for arbitrating requests from a plurality of interface units or ports, there being one such port associated with each functional unit. The functional units are densely packed, that is, mounted in immediately adjacent connectors to define a populated section of the backplane in which all connectors have ports coupled thereto, and one or two unpopulated sections of the backplane in which the connectors are empty. In the populated section, the effective characteristic impedance, designated Z.sub.0 ', is lower than the effective characteristic impedance, designated Z.sub.0, in the unpopulated region. A populated end of the transmission line is resistively terminated with a resistance corresponding to Z.sub.

Abstract: A data bus system utilizing logical transfer channels provides high data rates (even over long distances) and good error detection. The basic function of a transfer channel is to enable temporary assignment of some portion of the bus resource to a specific device and then to allow simple, quick addressing of that device by reference to that channel. There are a relatively small number of transfer channels (say four) that may be attached or detached by the channel processor (IOCP) to meet the data flow requirements. For a transfer to occur between the IOCP (15) and a device (30a, 30b), the IOCP (15) first effects an "attach" operation to assign the device (30a, 30b) a transfer channel for the duration of the transfer. Thereafter, the IOCP (15) allocates the bus cycles among the currently attached transfer channels according to any desired priority scheme, subject to the constraint that the device on a transfer channel be ready to send or receive data before that transfer channel may be granted cycles.

Abstract: A disk file management system for use in a data processing system that includes at least one disk drive. The disk space is organized on the basis of logical cylinders, with each logical cylinder including a plurality of disk pages and a cylinder control block ("CCB"). Each entry in the CCB corresponds to a page in the CCB's cylinder. Depending on whether a page is allocated to a file or not, the corresponding CCB entry is a file map entry for a file to which the page is allocated or an entry in a free space map. For a given file, each file map entry includes up to two pointers so that the totality of page map entries for the file defines an unbalanced binary tree structure that consists of a sequence of balanced binary trees of increasing size. The free space map for a given cylinder is preferably a chained free space list.

Abstract: Fully synchronous operation is provided by the use of separate frame and clock signals in each of the two directions relative to the IOCP, with all these signals controlled by the IOCP. The transmit (outbound) clock and frame signals (TCLK and TFRM) are simply sent on two lines from the IOCP to a bus terminator at the far end with the devices connecting to these lines in sequence. The receive (inbound) clock and frame signals (RCLK and RFRM) also originate at the IOCP, but their lines go directly to the far end where they are turned around and sent back to the IOCP with the devices being coupled to these lines in the reverse sequence. This provides a pair of signals that travel toward the IOCP but are still controlled by it for timing the incoming data.

Abstract: In a high speed data bus system, each functional unit has an associated port which operates to accept all related information that makes up a communication, or if this cannot be done, to accept none of the information. More particularly, an information transfer, depending on its nature, may comprise one BIQ or more than one BIQ (a "BIQ" is a bus information quantum which is placed on the bus for one bus cycle). To implement the indivisibility of multiple-BIQ transfers, the control logic for each port includes screening circuitry responsive to the state of the port's input buffers, and further responsive to flags from the functional unit for selectively accepting or rejecting BIQ's, and further includes screening constraint circuitry to ensure that the port accepts all or none of the BIQ's that make up the transfer. Depending on the flag, the rejection may be total, or may apply only to a designated class of transfers (for example, operations).

Abstract: A backplane power distribution system characterized by generally uniform current densities so as to be capable of handling very high levels of current. This is achieved with a stepped backplane construction. For example, in a system having, in order, a first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer, the second conductive and dielectric layers extend transversely beyond the first conductive and dielectric layers to present a substantial exposed area of the second conductive layer. Typically, a rectangular metal bus bar is bolted to the backplane to make contact with the exposed area, and power supply connections to the bus bar are made in any convenient manner. The backplane is preferably first laminated with all layers coextensive, and portions of the first conductive and dielectric layers then removed by milling.