Patents Assigned to EM Microelectronic-Marin
  • Publication number: 20250071556
    Abstract: A Bluetooth communication method implemented between a first electronic device (101) and a second electronic device (102), the second electronic device (102) being capable of sending a secure message including data to be processed by the first electronic device (101). The method includes obtaining (20) at least one security key by each of the first and second electronic devices (101, 102); and transmitting (38) the secure message by the second electronic device (102) to the first electronic device (101) including establishing (44) a communication link in a Bluetooth advertising mode between these first and second devices (101, 102).
    Type: Application
    Filed: January 20, 2023
    Publication date: February 27, 2025
    Applicant: EM Microelectronic-Marin SA
    Inventors: Julian GUILLOUX, Stéphanie SALGADO, Marcel RUECKER, Joachim NAGEL, Yann RAVIER
  • Patent number: 12229355
    Abstract: In a sensing device of a pointing device, like a mouse, said pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector, and at least one primary photodetector. Each individual storage element of photodetectors is weighted and compared such as to sense a displacement of the pointing device.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: February 18, 2025
    Assignee: EM Microelectronic-Marin SA
    Inventors: Sylvain Grosjean, Jérémy Schlachter
  • Patent number: 12224664
    Abstract: Provided is a gate controller having a primary signal input which is AC coupled to the gate through a capacitor, one or more bias inputs each connected to the gate through a resistor such as to control the DC voltage bias of the gate and therefore the conductivity o the switching element. The bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self-biased, without using bias-reference external to the charge pump. The gate controller is programmable by using potentiometers in place of the bias resistors. The programmable gate controller stages can be connected to form a programmable gate controlled charge pump.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: February 11, 2025
    Assignee: EM Microelectronic-Marin SA
    Inventor: Alessandro Venca
  • Publication number: 20240403591
    Abstract: A system (10) including an energy harvesting circuit (12) connectable to an antenna (14) and configured to execute an autonomous matching procedure to match the antenna (14) to an electric load (15), a buffer capacitor (16) connected to the energy harvesting circuit (14) and chargeable by the energy harvesting circuit (14), and a control circuit (20) connected to the energy harvesting circuit (14) and to the buffer capacitor (16) and connectable to the electric load (15), wherein the control circuit (20) is configured to control a supply voltage of the electric load (15), and wherein the control circuit (20) comprises an auxiliary capacitor (22) chargeable during execution of the autonomous matching procedure.
    Type: Application
    Filed: April 24, 2024
    Publication date: December 5, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventor: Kevin Scott BUESCHER
  • Patent number: 12153983
    Abstract: An RFID assembly and an assembly method thereof are provided. The assembly method for an RFID assembly comprises a step of providing at least one integrated circuit which includes at least one IC contact and at least one dielectric layer, and a deposition of at least one electrical contact and of at least one re-passivation layer. The at least one electrical contact is deposited on at least one first portion and the at least one re-passivation layer is deposited on at least one second portion, which is distinct of the at least one first portion.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: November 26, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventors: Paul Muller, Christophe Entringer, Pierre Muller, Thomas Coulot, Arthur Hugh MacDougall
  • Patent number: 12155298
    Abstract: An open loop control unit is provided to monitor an output power of a charge pump converter having an input impedance and a first input impedance controlling terminal configured to be plugged to the open loop control unit and modify the input impedance. The open loop control unit includes at least a reference circuit to sense the output power of the charge pump converter and at least one control circuit to receive the difference value, establish a trim value, and send the trim value to the impedance controlling terminal so as to modify the input impedance.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 26, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventor: Alessandro Venca
  • Patent number: 12147611
    Abstract: In a method for sensing a displacement of a pointing device, like a mouse, said pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector, and at least one primary photodetector. Each individual value of the photodetectors is weighted and compared such as to sense said displacement of the pointing device.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: November 19, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventors: Sylvain Grosjean, Jérémy Schlachter
  • Patent number: 12143009
    Abstract: A power control unit is provided to monitor the output power of a charge pump converter having an input impedance and an input impedance controlling terminal to be plugged to the power control unit and modify the input impedance. The power control unit includes a control circuit sense the output power of the charge pump converter and a control unit to receive the sensed power value, establish a control value, and send the control value to the impedance controlling terminal so as to modify the input impedance.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 12, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventor: Alessandro Venca
  • Publication number: 20240348226
    Abstract: An impedance matching network (10) for an active RFID transceiver (1), the impedance matching network (10) including: an impedance transformer (14) including a transformer input (13) and a transformer output (15), wherein the transformer input (13) is connectable to an antenna (12), an RF modulator (16) connectable to the transformer output (15), and an RF demodulator (20) capacitively coupled to the transformer output (15) via a capacitor (18).
    Type: Application
    Filed: March 27, 2024
    Publication date: October 17, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Cao-Thong TU, Kevin Scott BUESCHER
  • Patent number: 12101090
    Abstract: The disclosure concerns an oscillator circuit (10) for a signal transmitter, the oscillator circuit (10) comprising: a resonant circuit (12) comprising a resonant inductor (LR) and a resonant capacitor (CR) parallel to the resonant inductor (LR) or comprising a crystal device, a driving branch (14) comprising a pump capacitor (CP) connected to the resonant circuit (12), a feedback branch (20) connected to the resonant circuit (12), a phase shifting circuit (22) connected to the resonant circuit (12) via the feedback branch (20), a comparator circuit (24) connected to the feedback branch (20) via the phase shifting circuit (22) and a driver circuit (28) connected to an output of the comparator circuit (24) and operable to charge the pump capacitor (CP).
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: September 24, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventor: Jiri Nerad
  • Patent number: 12045405
    Abstract: An embodiment of the invention relates to a method for sensing a displacement of a pointing device, like a mouse. The pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector and at least one primary photodetector. Each individual value of photodetectors is weighted and compared to sense the displacement of the pointing device by comparing a plurality of storage elements.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: July 23, 2024
    Assignee: EM Microelectronic-Marin SA
    Inventors: Sylvain Grosjean, Jérémy Schlachter
  • Publication number: 20240211348
    Abstract: A method for managing data stored in a page (P) within a memory element of a memory system including a controller, the page (P) including at least one encoded data (E) consisting in a binary code being formed by a word (W 0-N) and its associated redundancy code (RC 0-N), the method including a step of storing a user data in this page (P) implemented by the controller, this step including a sub-step of performing error correction code (ECC) calculations on the user data providing an associated redundancy code (RC 0-N) corresponding to an erased redundancy code (RC E) for this user data if it has a reference binary code (br) of an erased word (W E) the erased redundancy code (RC E) having a binary value similar to that of the reference binary code (br).
    Type: Application
    Filed: November 28, 2023
    Publication date: June 27, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Stéphanie SALGADO, Thomas EBERHARDT
  • Publication number: 20240211342
    Abstract: An electronic device including a Bluetooth communication unit configured to perform Bluetooth communication, this unit including a memory module containing a memory controller and a memory element equipped with at least one page (P) including at least one encoded data (E) including a binary code being formed by a word (W 0-N) and its associated redundancy code (RC 0-N), the memory controller being configured to store a user data in this page (P) by performing error correction code (ECC) calculations on this user data for providing an associated redundancy code (RC 0-N) corresponding to an erased redundancy code (RC E) for this user data, if this user data has a reference binary code of an erased word (W E), the erased redundancy code (RC E) having a binary value similar to that of the reference binary code.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 27, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Stéphanie SALGADO, Thomas EBERHARDT
  • Publication number: 20240210590
    Abstract: A skin contact sensing device (10) including a contact sensor (11) operable to generate electrical contact signals being indicative of a skin contact; a processor (12) connected to the contact sensor (11) and operable to process the electrical contact signals received from the contact sensor (11); and a memory (15) connected to the processor (12) and operable to store at least one calibration parameter, wherein the processor (12) is operable to ascertain a skin contact by processing of the electrical contact signals on the basis of the at least one calibration parameter and wherein the processor (12) is operable to read and to obtain the at least one calibration parameter from the memory (15).
    Type: Application
    Filed: December 1, 2023
    Publication date: June 27, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Sylvain QUELOZ, Gérald MONIN
  • Publication number: 20240204758
    Abstract: A system with a low-drift on-chip (LD-RC) oscillator with lowered sensitivity to Random Telegraph Noise when generating a current (Id) for the LD-RC oscillator. A control resistor (R) is connected through an intermediary arrangement to one of a first MOS transistor (M1) or of a second MOS transistor (M2) between two terminals of a supply voltage source (Vdd). The gate of the first MOS transistor (M1) is connected to the gate of the second MOS transistor (M2), whereas the source of the first MOS transistor (M1) and the source of the second MOS transistor (M2) are connected to one terminal of the supply voltage source (Vdd), the control resistor (R) being connected to the other opposite terminal of the supply voltage source.
    Type: Application
    Filed: November 7, 2023
    Publication date: June 20, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Oskar KRENEK, Christoph KURATLI
  • Publication number: 20240170298
    Abstract: A method to produce an integrated circuit including depositing a first layer of a metallic chemical constituent on a silicon substrate. A protective layer including a main chemical constituent different from the main chemical constituent of the first layer is then deposited on this first layer. An additional layer is deposited on the protective layer and includes a main chemical constituent different from, equivalent to or of equivalent size to the main chemical constituent of the first layer. A heat treatment operation is carried out at a first temperature to generate a silicide including the main constituent of the first layer and silicon according to a first stoichiometry. In a subsequent step, the additional layer and the protective layer are removed. In another step, a further heat treatment operation is carried out at a temperature greater than the first temperature in order to change the stoichiometry of the previously created silicide.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 23, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Jean-Philippe JACQUEMIN, Jérôme LOLIVIER, René MEYER
  • Publication number: 20240145015
    Abstract: A method for reading data from a non-volatile memory array including a plurality of memory cells, each configured to store one bit of information. The method includes the steps of: powering on the memory array, where information from at least a first memory cell and a second memory cell is collectively associated with one bit of sensible data; b) reading a first memory cell value and a second memory cell value by comparing a reference value to a respective electrical property value of the respective memory cell to determine the respective memory cell value; c) adjusting the reference value in the event at least the first and second memory cell values have a first combination of logic state values to obtain an adjusted reference value; d) reading the first and second memory cell values by using the adjusted reference value to obtain a second combination of logic state values; and e) determining a sensible data bit value based on the obtained second combination of logic state values.
    Type: Application
    Filed: July 27, 2023
    Publication date: May 2, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Osama KHOURI, Yves GODAT
  • Publication number: 20240127875
    Abstract: An address decoder unit (30) for a memory cell array (10), the address decoder unit (30) including an address decoder (31) including an address input (33) and a number of address outputs (34, 35, 36), the address decoder (31) being operable to select one of the address outputs (34, 35, 36) in response to receive a memory address at the address input (33); and an address selection circuitry (32) connected to the address decoder (31) and including a number of address selection outputs (44, 45, 46) each of which connectable the memory cell array and each of which corresponding to one memory address, wherein the address decoder unit (30) is switchable into a memory erase mode, in which the address selection circuitry (32) is operable to select all address selection outputs (44, 45, 46) of an address space above or beyond a memory address provided at the address input (33).
    Type: Application
    Filed: September 26, 2023
    Publication date: April 18, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventors: Lubomir PLAVEC, Yves GODAT
  • Publication number: 20240126321
    Abstract: A clock distribution network (10) including a clock generator (14) configured to generate at least a processor clock signal and at least a first peripheral clock signal, the clock generator including a processor clock output (31), a first peripheral clock output (32) and a first clock request input (42). A first peripheral unit (22) via a first clock request input (42) is operable to trigger the clock generator (14) to transmit the first peripheral clock signal via the first peripheral clock output (32).
    Type: Application
    Filed: September 26, 2023
    Publication date: April 18, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventor: Ovidiu SIMA
  • Publication number: 20240120911
    Abstract: A digital logic controller including a first delay cell connectable to a signal input and operable to generate a first time delayed input signal, a second delay cell connectable to the signal input and operable to generate a second time delayed input signal, a counter connectable to the signal input via the first delay cell, two logic units to generate reset signal by one of logic units and to generate set signal by the other of logic units, and connected between the set of delay cells and a flip-flop operable to generate a counter valid signal at a flip-flop output, a first comparator connected to an output of the counter and operable to compare a counter output signal with a first target, a first logic gate connected to the flip-flop output, connected to the first comparator and operable to temporally deactivate processing of the counter output signal.
    Type: Application
    Filed: July 27, 2023
    Publication date: April 11, 2024
    Applicant: EM Microelectronic-Marin SA
    Inventor: Ovidiu SIMA