Abstract: A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.

Abstract: A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, (2) discharging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, repeating (1).

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, (2) discharging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, repeating (1).

Abstract: A switching voltage converter is disclosed. The voltage converter includes a controller configured to generate first and second control signals, and a switch stack including six serially connected switches configured to receive a plurality of fixed voltages and the first and second control signals. The switch stack is configured to generate a voltage signal at a switch node based on the fixed voltages and on the control signals. In addition, the voltage signal is controlled to be substantially equal to a first fixed supply voltage or substantially equal to a second fixed supply voltage according to the first and second control signals, and an output filter connected to the switch node and configured to generate an output voltage based on the voltage at the switch node.

Abstract: A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) prefluxing the inductor then charging the capacitor causing an increased current to flow in the inductor and (2) prefluxing the inductor then discharging the capacitor causing increased current to flow in the inductor. The inductor prefluxing steps enable the circuit to provide increased output voltage and/or increased output current.

Abstract: A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing a current to flow in the inductor and (2) discharging the capacitor causing current to flow in the inductor. The power regulator circuit may be configured to operate with zero current switching at frequencies in the range of 100 MHz, enabling it to be fabricated on a unitary silicon die along with the load that it powers.