Abstract: A semiconductor structure includes a substrate, a first semiconductor layer, a second semiconductor layer and a p-type ion doping layer sequentially disposed, the p-type ion doping layer includes an activation region and a passivation region enclosing the activation region, and the activation region is an oxygen-doped region. Hydrogen doped in the p-type ion doping layer can be replaced by low-temperature annealing after a process of implementing oxygen ion-implantation, so as to improve activation efficiency of the p-type ion doping layer; the activation region in a gate electrode region and the passivation region in an non-gate electrode region are formed by using a method for selectively activating the p-type ion doping layer, avoiding etching of the p-type ion doping layer, and thus avoiding etching losses; and a plurality of patterned activation regions are obtained by selectively activating on a same substrate, which facilitates batch preparation of enhancement mode semiconductor devices.

Abstract: Disclosed are a semiconductor device and a manufacturing method therefor. The semiconductor device includes an n-type layer, a multiple quantum well layer, and a p-type ion doping layer which are disposed in sequence. The p-type ion doping layer includes an activation region and a passivation region, and the activation region is an oxygen doping region. By selectively activating the p-type ion doping layer, a passivation region at an edge of a light-emitting unit and a passivation region under the first electrode are formed, so that uniformity of luminous exitance of a device may be improved, and current crosstalk in the p-type layer may be avoided without etching and filling insulating medium or cutting isolation channels between the light-emitting units, thereby simplifying a manufacturing process of the device, and achieving a more uniform luminous exitance and higher light extraction rate of the semiconductor device.

Abstract: Disclosed are an LED structure, an LED device and a manufacturing method for the LED structure. The LED structure includes a substrate structure including a substrate and a plurality of first stress modulation layers located on the substrate periodically and separately; and a light-emitting unit located on the substrate structure; wherein the substrate structure includes a first region of which upper surface is the first stress modulation layer and a second region of which upper surface is the substrate, and a light-emitting unit located on the first region and a light-emitting unit located on the second region have different light-emitting wavelengths, which realizes a light-emitting unit with two kinds of main light-emitting wavelengths on the same substrate.

Abstract: Disclosed are an LED structure, an LED device, and a manufacture method for the LED structure. The LED structure includes a substrate structure, and a first region and a second region are periodically provided in the substrate structure. The substrate structure includes a substrate and at least one patterned mask layer located on the substrate, the at least one patterned mask layer is located in the second region, and patterned mask layer in each second region are periodically provided. A light-emitting unit is located on the substrate structure, the light-emitting unit includes a first sub-light-emitting structure located in the first region and a second sub-light-emitting structure located in the second region, and light-emitting wavelengths of the first sub-light-emitting structure and the second sub-light-emitting structure are different. A light-emitting unit with two main light-emitting wavelengths is realized on a same substrate.

Abstract: Disclosed are a semiconductor structure and a method for preparing the same, relating to the field of semiconductor technologies. The semiconductor structure includes: a substrate; and a plurality of functional film layers stacked on the substrate, the plurality of functional film layers include a first semiconductor layer and a second semiconductor layer stacked with each other, the first semiconductor layer is arranged between the substrate and the second semiconductor layer. The first semiconductor layer includes a plurality of defect pits recessed toward the substrate, the defect pits are filled by the second semiconductor layer, and one side of the second semiconductor layer away from the first semiconductor layer is a plane. The semiconductor structure and the preparation method thereof provided in the present application solve the problem of vertical leakage in the semiconductor structure in the prior art.

Abstract: The present disclosure provides LED structures and manufacturing methods thereof, LED devices and manufacturing methods thereof. The LED structure includes a substrate, light emitting units, first electrodes and second electrodes, and the substrate is provided with grooves with different depths. A light emitting unit is disposed in each of the grooves and includes a first semiconductor layer, a light emitting layer on the first semiconductor layer and a second semiconductor layer on the light emitting layer; light emitting layers in grooves with different depths emit different colors. A first electrode and a second electrode in each groove, the first electrode is electrically connected with the first semiconductor layer, and the second electrode is electrically connected with the second semiconductor layer.

Abstract: The present disclosure provides an LED structure and a preparation method thereof. The LED structure includes: a first conductivity semiconductor layer; a stress releasing layer disposed on the first conductivity semiconductor layer, and a material of the stress releasing layer is a III-V group semiconductor material; a V-shaped layer disposed on the stress releasing layer and having V-shaped grooves, where the V-shaped grooves are formed under a control of the stress releasing layer; a multi-quantum well layer, configured to conformally cover a surface of the V-shaped layer away from the stress releasing layer; a second conductivity semiconductor layer disposed on a side of the multi-quantum well layer away from the first conductivity semiconductor layer, where a conductivity type of the second conductivity semiconductor layer is different from that of the first conductivity semiconductor layer.