Patents Assigned to Ensiltech Corporation
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Publication number: 20140050847Abstract: Provided are a deposition method of patterning a thin film on a substrate using momentary Joule heating in a vacuum environment, and a method thereof. The deposition device forms a deposition target layer on one surface of a source substrate as a pattern to be deposited. A deposition target layer forming unit forms a deposition target layer on the one surface of the source substrate to cover the conductive layer. A chamber in a vacuum state receives the source substrate on which the conductive layer and the deposition target layer are formed and the target substrate. A target substrate is disposed in the chamber to face the source substrate. A power supply applies power to the conductive layer to heat-generate the conductive layer. A configuration of the deposition device is very simple, and it is easy to uniformly form a deposition thickness.Type: ApplicationFiled: August 20, 2012Publication date: February 20, 2014Applicant: EnSilTech CorporationInventors: Jae-Sang RO, Won-Eui Hong, Seog-Young Lee, Ingoo Jang
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Patent number: 8603869Abstract: Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer of a thin film transistor using a polysilicon layer crystallized by a high temperature heat generated by Joule heating of a conductive layer. As a result, a process can be simplified using a gate line included in the thin film transistor as the conductive layer, and the channel region of the semiconductor layer can be formed of polysilicon having a uniform degree of crystallinity. The thin film transistor includes a straight gate line disposed in one direction, a semiconductor layer crossing the gate line, and source and drain electrodes connected to source and drain regions of the semiconductor layer.Type: GrantFiled: November 20, 2008Date of Patent: December 10, 2013Assignee: Ensiltech CorporationInventors: Jae-Sang Ro, Won-Eui Hong
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Publication number: 20130089954Abstract: There is provided a method of fabricating an electronic device having a flexible device, which is fabricated using a support substrate by Joule-heating induced film separation (JIFS). A method of fabricating an electronic device having a flexible device includes providing a support substrate, coating a conductive layer on one surface of the support substrate, forming a plastic substrate on the other surface of the support substrate, forming one or more thin-film transistors (TFTs) on the plastic substrate, forming an electronic device electrically connected to any one of the TFTs, and separating the plastic substrate from the conductive layer by generating Joule-heating through application of an electric field to the conductive layer. Accordingly, the flexible device can be separated from the support substrate without deformation of the support substrate and degradation of the electronic device.Type: ApplicationFiled: October 6, 2012Publication date: April 11, 2013Applicant: EnSilTech CorporationInventor: EnSilTech Corporation
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Patent number: 8400057Abstract: An organic electroluminescence apparatus comprises: a substrate having a pixel region and sealing regions; an organic electroluminescence device located in the pixel region of the substrate; and a sealing substrate having a pixel region and sealing regions corresponding to the pixel region and the sealing regions of the substrate. The sealing regions of the sealing substrate comprise conductive layers continuously connected to each other. In a method of manufacturing organic electroluminescence apparatus by sealing the substrate and the sealing substrate using a glass frit, manufacturing costs and process time can be greatly reduced.Type: GrantFiled: November 18, 2010Date of Patent: March 19, 2013Assignees: Samsung Display Co., Ltd., EnsilTech CorporationInventors: Oh-Seob Kwon, Dong-Seop Park, Jung-Jun Im, Jae-Sang Ro, Won-Eui Hong, Seog-Young Lee
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Publication number: 20130047920Abstract: There are provided a deposition device for forming an organic layer using Joule heating and a device for fabricating an electroluminescent display device using the deposition device that includes a cleansing device, an organic matter coating device, an electric field applying device and a loadlock chamber. The cleansing device cleanses a donor substrate. The organic matter coating device coats an organic matter on the donor substrate. The electric field applying device allows the organic matter to be transferred onto an element substrate. Here, the organic matter is heated by the Joule-heating generated by applying an electric field to the donor substrate having the organic matter formed thereon. The loadlock chamber loads or carries out the donor substrate into/from the electric field applying device. Accordingly, the present invention is advantageous in fabricating a large-scale element, and it is possible to increase a processing speed and to reduce device cost.Type: ApplicationFiled: August 22, 2012Publication date: February 28, 2013Applicant: EnSilTech CorporationInventors: Jae-Sang RO, Won-Eui Hong
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Patent number: 8128714Abstract: Provided is an apparatus for manufacturing a polysilicon thin film by depositing an amorphous silicon thin film and an upper silicon dioxide substrate on a lower silicon dioxide substrate, forming a conductive thin film on the upper silicon dioxide substrate, and applying an electric field and performing Joule heating to crystallize the amorphous silicon thin film, the apparatus comprising power terminals for elastically contacting both upper ends of the conductive thin film and supplying power to the conductive thin film, and support members for elastically supporting the substrate such that the power terminals closely contact both upper ends of the conductive thin film to form a uniform electric field at the conductive thin film.Type: GrantFiled: January 30, 2009Date of Patent: March 6, 2012Assignee: Ensiltech CorporationInventors: Jae-Sang Ro, Won-Eui Hong
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Patent number: 8124530Abstract: Disclosed herein is a rapid annealing method in a mixed structure composed of a heat treatment-requiring material, dielectric layer and conductive layer, comprising that during rapid annealing on a predetermined part of the heat treatment-requiring material, by instantaneously generated intense heat due to Joule heating by application of an electric field to the conductive layer, the potential difference between the heat treatment-requiring material and the conductive layer is set lower than the dielectric break-down voltage of the dielectric layer, thereby preventing generation of arc by dielectric breakdown of the dielectric layer during the annealing.Type: GrantFiled: January 10, 2007Date of Patent: February 28, 2012Assignee: Ensiltech CorporationInventors: Jae-Sang Ro, Won-Eui Hong