Abstract: According to examples, an apparatus may include a security enclosure, a main processor housed in the security enclosure, and a physical security monitoring control unit (PSMCU) processor housed in the security enclosure. The PSMCU processor may cause the apparatus to switchably operate between a first mode and a second mode. In the first mode, the PSMCU processor may allow access by the main processor to a first cryptographic key while preventing access by the main processor to a second cryptographic key. In addition, in the second mode, the PSMCU processor may allow access by the main processor to the second cryptographic key while preventing access by the main processor to the first cryptographic key.

Abstract: According to examples, an apparatus may include a processor and a memory on which is stored machine readable instructions to cause the processor to access network traffic traces including a plurality of timestamps, the plurality of timestamps having an order with respect to each other. The instructions may also cause the processor to encrypt the plurality of timestamps to anonymize the plurality of timestamps while preserving the order of the plurality of timestamps with respect to each other and to store the encrypted plurality of timestamps in a data store.

Abstract: According to examples, an apparatus may include a processor and a non-transitory computer readable medium storing machine readable instructions. The instructions may cause the processor to access a plurality of widgets, in which each of the plurality of widgets includes a data value. The instructions may also cause the processor to identify a widget of the plurality of widgets including a data value that has changed over time by an amount that exceeds a pre-defined threshold as a widget-of-interest and output a notification regarding a suggestion for the widget-of-interest to be displayed on a user dashboard.

Abstract: According to examples, an apparatus may include a processor and a memory on which is stored machine readable instructions executable by the processor to access network activity data collected over a time period associated with a plurality of network entities, in which each of the network entities is assigned a distinct internet protocol (IP) address including a network prefix set of bits and a network entity identifier set of bits. The instructions may also cause the processor to generate representations of the network activity data corresponding to the respective network entities and display the generated representations of the network activity data corresponding to the respective network entities on an IP address block map according to the network entity identifier set of bits of the respective network entities.

Abstract: According to an example, a system may receive a refresh column command for a column-oriented database. The refresh column command may identify a table in the column-oriented database and a denormalized column in the table. The system may determine column definitions for the column, generate a query to populate values from a data source associated with the column into the column based on the column definitions, and may execute the query to replace entire set of existing column values with the data source values.

Abstract: In some examples, test relevancy prediction for code changes may include ascertaining files for a commit for a build, and for each test of a plurality of tests, determining a score based on a weight assigned to a file of the ascertained files. Test relevancy prediction for code changes may further include ordering each test of the plurality of tests according to the determined score, and identifying, based on the ordering of each test of the plurality of tests, tests from the plurality of tests for which the score exceeds a specified threshold. The identified tests may represent tests that are to be applied to the build.

Abstract: According to an example, secure key component and PIN entry may include receiving a communication from a smart card control device upon connection of the smart card control device with a secure key component and PIN entry apparatus. The communication may be related to storage of a key component on a smart card that is communicatively connectable to the apparatus. The key component may be related to a Master File Key (MFK) that is formed by using a plurality of key components including the key component. In response to the communication, the smart card may be prompted to generate the key component, or entry of the key component may be received based on actuation of a keypad of the apparatus. Further, the generated or received key component may be stored on the smart card upon connection of the smart card with the apparatus.