Abstract: A method for passing photovoltaic current between a subcell formed from a single crystal Group ll-VI semiconductor material and a subcell formed from a single crystal Group IV semiconductor material, includes the steps of forming a first subcell by an epitaxial growth process, the first subcell having a first upper surface; forming a tunnel heterojunction between the first subcell and the second subcell, and tunneling carriers formed by light incident on the first and second subcells through the tunnel heterojunction, thereby permitting a photoelectric series current to flow through the first and second subcells.

Abstract: A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel heterojunction interposed between the first and second subcells. A first side of the tunnel heterojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type, is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel heterojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type, and is comprised of a highly doped Group II-VI semiconductor material. The tunnel heterojunction permits photoelectric series current to flow through the subcells.

Abstract: A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel heterojunction interposed between the first and second subcells. A first side of the tunnel heterojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type, is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel heterojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type, and is comprised of a highly doped Group II-VI semiconductor material. The tunnel heterojunction permits photoelectric series current to flow through the subcells.

Abstract: A method of forming a Group II-VI multijunction semiconductor device comprises providing a Group IV substrate, forming a first subcell from a first Group II-VI semiconductor material, forming a second subcell from a second Group II-VI semiconductor material, and removing the substrate. The first subcell is formed over the substrate and has a first bandgap, while the second subcell is formed over the first subcell and has a second bandgap which is smaller than the first bandgap. Additional subcells may be formed over the second subcell with the bandgap of each subcell smaller than that of the preceding subcell and with each subcell preferably separated from the preceding subcell by a tunnel junction. Prior to the removal of the substrate, a support layer is affixed to the last-formed subcell in opposition to the substrate.

Abstract: A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel homojunction interposed between the first and second subcells. A first side of the tunnel homojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type and is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel homojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type and also is comprised of a highly doped Group IV semiconductor material. The tunnel homojunction permits photoelectric series current to flow through the subcells.

Abstract: A Group II-VI photovoltaic solar cell comprising at least two and as many as five subcells stacked upon one another. Each subcell has an emitter layer and a base layer, with the base of the first subcell being made of silicon, germanium, or silicon-germanium. The remaining subcells are stacked on top of the first subcell and are ordered such that the band gap gets progressively smaller with each successive subcell. Moreover, the thicknesses of each subcell are optimized so that the current from each subcell is substantially equal to the other subcells in the stack. Examples of suitable Group II-VI semiconductors include CdTe, CdSe, CdSeTe, CdZnTe, CdMgTe, and CdHgTe.

Abstract: At least one wafer is suspended on a respective jig shaft above a polishing platen. The degree of parallelism between the wafer and the polishing platen is controlled using a three-point suspension, which allows for planar pitch adjustments using vertical actuation algorithms. As the wafer is lowered into contact against the polishing platen, a load cell senses how much of the weight of the jig shaft, wafer mount and wafer continues to be supported by the jig. The vertical displacement of the wafer is controlled using a linear actuator responsive to a signal from the load cell. Vertical actuation of the wafer serves to increase or decrease this amount of supported weight, in turn decreasing or increasing the amount of applied down-force exerted between the wafer and the platen. A compression spring is used to increase the resolution of the pressure control. Finally, system components exposed to the work environment are encapsulated by chemically resistive components to prevent corrosion of system components.

Abstract: A method of forming a diode comprises the steps of forming an extraction region of a first conductivity type, forming an active region of a second conductivity type that is opposite the first conductivity type, and forming an exclusion region of the second conductivity type to be adjacent the active region. The active region is formed to be adjacent to the extraction region and along a reverse bias path of the extraction region and the exclusion region does not resupply minority carriers while removing majority carriers. At least one of the steps of forming the exclusion region and forming the extraction region includes the additional step of forming a barrier that substantially reduces the flow of the carriers that flow toward the active region, but does not rely on a diffusion length of the carriers to block the carriers.

Abstract: A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel homojunction interposed between the first and second subcells. A first side of the tunnel homojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type and is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel homojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type and also is comprised of a highly doped Group IV semiconductor material. The tunnel homojunction permits photoelectric series current to flow through the subcells.

Abstract: At least one wafer is suspended on a respective jig shaft above a polishing platen. The degree of parallelism between the wafer and the polishing platen is controlled using a three-point suspension, which allows for planar pitch adjustments using vertical actuation algorithms. As the wafer is lowered into contact against the polishing platen, a load cell senses how much of the weight of the jig shaft, wafer mount and wafer continues to be supported by the jig. The vertical displacement of the wafer is controlled using a linear actuator responsive to a signal from the load cell. Vertical actuation of the wafer serves to increase or decrease this amount of supported weight, in turn decreasing or increasing the amount of applied downforce exerted between the wafer and the platen. A compression spring is used to increase the resolution of the pressure control. Finally, system components exposed to the work environment are encapsulated by chemically resistive components to prevent corrosion of system components.

Abstract: A detector of incident infrared radiation has a first region with a first spectral response, and a second region with a second, different spectral response. The second absorption region is stacked on the first and may be separated therefrom by a region in which the chemical composition of the compound semiconductor is graded. Separate contacts are provided to the first and second absorption regions and a further common contact is provided so as to permit the application of either a bias voltage or a skimming voltage across the respective pn junctions. The detector may be operated such that a preselected one of the absorption regions responds to incident infrared radiation of a predetermined waveband while the other absorption region acts as a skimmer of dark current, thereby enhancing the signal to noise ratio of the detector.

Abstract: A photosensitive diode has an active region defining a majority carrier of a first conductivity type and a minority carrier of a second conductivity type. An extraction region is disposed on a first side of the active region and extracts minority carriers from the active region. It also has majority carriers within the extraction region flowing toward the active region in a condition of reverse bias. An exclusion region is disposed on a second side of the active region and has minority carriers within the exclusion region flowing toward the active region. It receives majority carriers from the active region. At least one of the extraction and exclusion region provides a barrier for substantially reducing flow of one of the majority carriers or the minority carriers, whichever is flowing toward the active region, while permitting flow of the other minority carriers or majority carriers flowing out of the active region.

Abstract: Structures and methods to inject electrons into an insulator from a semiconductor layer that are then collected in a thin layer of a direct semiconductor material which in turn emits light by bandgap recombination.

Abstract: A photosensitive diode has superlattice exclusion region formed from a stack of first and second layers. The first layers are penetrated by minority carriers using quantum mechanical tunneling and reduce minority carrier mobility. The second layers have a sufficiently low bandgap that the tunneling minority carriers can reach an active region of the diode. The process of successively forming first and second layers is repeated until the exclusion region is at least three times the minority carrier diffusion length.

Abstract: A photosensitive diode has an active region defining a majority carrier of a first conductivity type and a minority carrier of a second conductivity type. At least one extraction region is disposed on a first side of the active region and has a majority carrier of the second conductivity type. Carriers of the second conductivity type are extracted from the active region and into the extraction region under a condition of reverse bias. At least one exclusion region is disposed on a second side of the active region and has a majority carrier of the first conductivity type. The exclusion region prevents entry of its minority carriers, which are of the second conductivity type, into the active region while in a condition of reverse bias. The exclusion region includes a superlattice with a plurality of layers.

Abstract: At a face of a silicon semiconductor substrate tilted about one degree from a [100] orientation, a readout integrated circuit (ROIC) is implemented, specially designed and fabricated for direct epitaxial growth. Layers of II-VI semiconductor material, preferably including layers of HgCdTe of different bandgaps, are successively and monolithically grown on the face by molecular beam epitaxy (MBE) within a window masking the face and then patterned and wet-etched to create mesas of two-color detector elements in an array. Preferably a beginning buffer layer of CdTe is grown to minimize crystalline mismatch between the Si and the HgCdTe. Sloped sidewalls of the mesas ensure good step coverage of the conductive interconnects from the detector elements to the ROIC.