Abstract: An optical detection system for detecting an incident optical signal is described. The system includes an optical package adapted to collect the incident optical signal and directed it to a detector array that is coupled thereto. The array outputs electrical signals to be analyzed by a processor. The processor is adapted to iterate algorithms using the signals to calculate an incident angle of arrival for the incident optical signal and a range of the source of the optical signal to the system based on the angle of arrival calculation. The processor is further configured to discriminate the optical signal spectrally to calculate wavelengths thereof for false alarm rejection.

Abstract: Two resonant tunneling diodes with hysteretic folding V-I characteristics are connected in series. The node voltage and the series current of the cell determine the memory state and there can be a large number of states. During writing, one writing pulse sets the pull-down RTD to one of the positive differential resistance region of the hysteretic V-I characteristic, and a second writing pulse sets the pull-up RTD to one of positive differential resistance region. During writing, the series current is sensed by measuring the colon ground current.

Abstract: More than one photodetectors, each sensitive to different wavelengths, are integrated on a common semiconductor substrate. The different photodetectors can be stacked over one another or placed laterally on the common substrate. Gratings may be placed over each photodetector to sharpen the spectral response. Three such photodetectors can form a pixel of an active matrix array for an image sensor. The different photodetectors in each pixel can be multiplexed electronically. The electronic circuits for activating the different photodetectors can be integrated on the same substrate.

Abstract: A two-dimensional memory comprises a matrix of multi-valued resonant tunneling diodes (RTD). Each memory cell has two series RTDs with hysteretic folding V-I characteristics. The memory state is determined by the node voltage between the two RTDs and the series current. Each memory cell has two terminals connected to two bit lines through word line switches. The two bit lines are fed with two sets of multi-valued data and are written into the cell by two consecutive pulses to set the operating point. The two sets of multi-valued data are converted by two D/A converters from two sub-words of the binary digital word. The memory state is read by the sensing the voltages at the two terminals, or voltage at one terminal and the current through the other terminal.