Patents Assigned to EPSON Research and Development , Inc.
  • Publication number: 20030112915
    Abstract: A phase lock loop lock detect circuit determines whether an output signal of the phase lock loop is in phase-frequency synchronization with an input reference timing signal and provides an unlock alarm signal indicating that the output signal of a phase lock loop is no longer in phase-frequency synchronization with an input reference timing signal. The lock detection circuit has a first logic function circuit to combine a frequency increase signal and a frequency decrease signal of said phase lock loop to provide a frequency deviation signal. The first logic function in the preferred embodiment of this invention is an OR gate. The output of the first logic function circuit is an input to a second logic function circuit.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Applicant: EPSON Research and Development , Inc.
    Inventor: David Meltzer