Patents Assigned to Epworks Co., Ltd.
  • Patent number: 8821826
    Abstract: A method for regenerating silicon from silicon waste includes: placing and mixing silicon waste, a solvent having pH of approximately 5 to approximately 6, and a surfactant within a container; and injecting air into the container to separate floating matters and precipitates. Accordingly, since silicon is easily separated from the silicon waste, the regeneration yield of silicon is increased. Since the regenerated silicon is recyclable, it may be possible to obtain important substitution effect of high-purity silicon the entire amount of which depends on import. Moreover, environmental pollution may be reduced because the amount of the silicon waste disposed of by burial is decreased.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: September 2, 2014
    Assignee: Epworks Co., Ltd.
    Inventors: Gu Sung Kim, Kun Kul Ryoo, Jae June Kim
  • Publication number: 20120225501
    Abstract: Provided is a three-dimensional semiconductor device. The three-dimensional semiconductor device includes a body in which a plurality of semiconductor chips or packages are stacked, a protective substrate configured to protect an outer layer chip or package of the body and configured to transmit a laser beam, and a fuse pattern portion having a pattern of a fuse function formed to cut off an electrical connection of a defective chip or package by the laser beam penetrating the protective substrate when at least one of the chips or packages is defective.
    Type: Application
    Filed: May 11, 2012
    Publication date: September 6, 2012
    Applicant: EPWORKS CO., LTD.
    Inventor: Gu-Sung Kim
  • Publication number: 20110272729
    Abstract: A wafer level LED interposer and its manufacturing method is provided. The wafer level LED interposer includes: a LED chip of which N-type electrode and p-type electrode are formed on the upper side; an interposer substrate formed with through vias at each position corresponding to the N-type electrode and the p-type electrode and bonded to the upper side of the LED chip, wherein the N-type electrode and p-type electrode are connected to each through via; a redistribution layer formed on the upper surface of the interposer substrate and electrically connected to the through vias; a solder resist layer coated on the upper surface of the interposer substrate for a part of the redistribution layer selectively to be opened; and an external connector formed at the position where the redistribution layer is opened.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 10, 2011
    Applicant: EPWORKS CO., LTD.
    Inventors: Gu-Sung Kim, Jae-June Kim, Young-Mo Koo
  • Publication number: 20110081289
    Abstract: A method for regenerating silicon from silicon waste includes: placing and mixing silicon waste, a solvent having pH of approximately 5 to approximately 6, and a surfactant within a container; and injecting air into the container to separate floating matters and precipitates. Accordingly, since silicon is easily separated from the silicon waste, the regeneration yield of silicon is increased. Since the regenerated silicon is recyclable, it may be possible to obtain important substitution effect of high-purity silicon the entire amount of which depends on import. Moreover, environmental pollution may be reduced because the amount of the silicon waste disposed of by burial is decreased.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 7, 2011
    Applicant: EPworks CO., LTD.
    Inventors: Gu Sung KIM, Kun Kul RYOO, Jae June KIM
  • Publication number: 20100193903
    Abstract: Provided is a three-dimensional semiconductor device. The three-dimensional semiconductor device includes a body in which a plurality of semiconductor chips or packages are stacked, a protective substrate configured to protect an outer layer chip or package of the body and configured to transmit a laser beam, and a fuse pattern portion having a pattern of a fuse function formed to cut off an electrical connection of a defective chip or package by the laser beam penetrating the protective substrate when at least one of the chips or packages is defective.
    Type: Application
    Filed: July 30, 2008
    Publication date: August 5, 2010
    Applicant: EPWORKS CO., LTD.
    Inventor: Gu-Sung Kim
  • Patent number: 7264995
    Abstract: The present invention provides a method for manufacturing a wafer level chip scale package using a redistribution substrate, which has patterned bump pairs connected by redistribution lines and formed on a transparent insulating substrate. The redistribution substrate is produced separately from a wafer and then bonded to the wafer. One part of each bump pair is in contact with a chip pad on the active surface of the wafer, and the other part coincides with one of holes formed in the wafer. Conductive lines are formed in the holes and on the non-active surface of the wafer. External connection terminals are formed on the conductive lines at the non-active surface.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: September 4, 2007
    Assignee: Epworks Co., Ltd.
    Inventor: Jae-June Kim