Abstract: Systems and methods are described relating to a matcher that inputs partial vectors at a rate of 1 per clock cycle and delivers complete vectors at the output with an indication per vector of its validity. The matcher can copy a maximum number of valid elements from an input queue to target vector in-order each clock cycle and eliminate copied elements from the input queue. The completely filled target vectors are paired with the complete data vectors and outputted as composite vectors.

Abstract: A power management integrated circuit comprises a plurality of power source circuits power received at a power supply input terminal to supply power to a plurality of power supply output terminals. A plurality of power source circuits is coupled between the power supply input terminal and the respective power supply output terminals. The power management integrated circuit comprises an active configuration memory and a communication interface with at least one terminal for uploading configuration data from outside the power management integrated circuit into the configuration memory. A control circuit controls operating parameters of respective ones of the power source circuits dependent on the configuration data from the active configuration memory. Thus, the power management integrated circuit is able to switch between different power supply states in a dynamically configurable way, without requiring external control over the configuration during switching.

Abstract: Systems and methods are provided for authenticating Internet Protocol (IP) Multimedia Subsystem (IMS) applications in a User Equipment (UE). A method includes: receiving a first Session Initiation Protocol (SIP) REGISTER message from an IMS application operating on the UE; transmitting a response message to the IMS application based on the received first SIP REGISTER message; receiving a second SIP REGISTER message from the IMS application operating on the UE; determining authentication for the IMS application based on the received second SIP REGISTER message from the IMS application operating on the UE; and based on the step of determining authentication for the IMS application, if the IMS application is authorized, then transmitting information associated with the first and second SIP REGISTER messages toward a SIP node or if the IMS application is unauthorized, then discarding data associated with the first and second SIP REGISTER messages.

Abstract: A resource management unit for a mobile telephone terminal, with the terminal comprising radio transmission/reception means for transmitting and receiving radio frequency signals corresponding to bursts of symbols during allocated time slots, and a device able to operate in a first mode and in a second mode, said device interfering less with the transmission/reception of radio frequency signals when it is in the first mode than when it is in the second mode. The resource management unit is able to cause the device to change from one of the first and second modes to the other of the first and second modes during the same time slot.

Abstract: An inductor layout (200, 300, 400) comprising a first inductor (210, 310, 410) and a second inductor (220, 320, 420). The first and second inductors (210, 310, 410; 220, 320, 420) are electrically and magnetically independent inductors concentrically arranged on an integrated circuit 800. At least one of the first and second inductors (210, 310, 410; 220, 320, 420) is a multi-loop inductor with a first axis (226a, 316a, 326a, 416a, 426a) of symmetry.

Abstract: One or more tasks to be executed on one or more processors are formulated into a graph, with dependencies between the tasks defined as edges in the graph. In the case of a Radio Access Technology (RAT) application, the graph is iterative, whereby each task may be activated a number of times that may be unknown at compile time. A discrete number of allowable frequencies for processors while executing tasks are defined, and the power dissipation of the processors at those frequencies determined. A linear programming problem is then formulated and solved, which minimizes the overall power dissipation across all processors executing all tasks, subject to several constraints that guarantee complete and proper functionality. The switching of processors executing the tasks between operating points (frequency, voltage) may be controlled by embedding instructions into the tasks at design or compile time, or by a local supervisor monitoring execution of the tasks.

Abstract: An automatic gain control (AGC) method and system for a radio receiver are proposed in which the ACG comprises two AGC loops; a first loop controlling signal gain in the analog portion of the radio receiver, a second loop controlling gain in the digital domain after digitization of the received signal. The analog AGC loop has a slower response time than the digital AGC loop. When applied to a multi-branch diversity receiver, each branch has its own digital AGC loop, but the analog gain can be common to all branches, based on measurement of the analog signal in each branch.

Abstract: The invention provides circuitry integrated into a silicon chip that measures aspects of an RF signal on a transmission line in order to provide data that is ultimately used by an antenna tuner circuit to substantially match the impedance of the antenna with that of the transmission line providing the RF frequency to be transmitted.

Abstract: Multiple-input multiple-output (MIMO) with multiple power amplifiers and antennas in a mobile transmitter, such as a user equipment for a cellular telephone communication system, has such great impacts on the transmitter's battery life, form factor, and complexity that it should not be used unless its benefits clearly outweigh its costs. Methods and apparatus enable the benefits of MIMO by beam-forming and antenna-switching to be obtained without incurring the drawbacks of increased current consumption due to multiple power amplifiers.

Abstract: A wireless communication device (400) is arranged to transmit a transmission signal in an assigned channel bandwidth. The wireless communication device (400) comprises: a local oscillator (460) arranged to generate a local oscillator signal at a local oscillator frequency and a modulator (434) arranged for converting in-phase and quadrature-phase components of a modulation signal at a modulation frequency to a radio frequency by mixing the in-phase and quadrature-phase components with the local oscillator signal. The local oscillator frequency is arranged to place a third order intermodulation product having a frequency equal to the local oscillator frequency minus three times the modulation frequency within the assigned channel bandwidth.

Abstract: A method of driving a mobile communication terminal in a cellular network, includes monitoring with a control unit of the mobile communications terminal, reception power levels between the mobile communication terminal and cellular network base stations at a predefined monitoring rate for each base station. Timing information values for a number of base stations are intermittently monitored by the control unit. Drift of the timing information values for at least two of the base stations is monitored and significant motion of the mobile communication terminal is deemed detected if at least one of the timing information values indicates a drift equal to or exceeding a given timing drift threshold. The predefined reception power level monitoring rate is reduced to a reduced reception power level monitoring rate for at least a number of the base stations as long as the motion of the mobile communication terminal is not significant.

Abstract: A power supply start-up sequencing mechanism for controlling activation of a plurality of power supply circuits with a predetermined timing is disclosed. The mechanism comprises a time value generator arranged to provide a time value signal; and for each of the power supply circuits, a logic circuit arranged to receive the time value signal and from the received signal provide an activation signal to the respective power supply circuit, wherein the respective logic circuit is associated with a start timing value for the respective power supply circuit such that the activation signal is provided when the associated start timing value coincides with the received time value signal. An apparatus comprising such a mechanism, and a method for controlling activation of a plurality of power supply circuits are also disclosed.

Abstract: The present invention relates a method, apparatus, receiver, computer program for joint detection. In the method, it is firstly determined if whether a number of original active codes is beyond a predefined threshold or not, and when the number of the original active codes is beyond the predefined threshold and a strong interference code exists in the active codes corresponding to intra-frequency adjacent cells, it is to apply an interference cancellation to a receive signal, cancel MAI caused by a strong interference signal corresponding to the strong interference code, and perform a joint detection by utilizing a matched filtering result of a remaining signal after the interference cancellation for the joint detection. According to at least one embodiment of the present invention, when there is large interference in the intra-frequency adjacent cells and the number of the active codes is beyond a maximum threshold, the joint detection performance is improved.

Abstract: A device and a method for implementing pulse width modulation for switching amplifiers (120) is described herein. In one embodiment, the device includes a sampling signal generator (202) to generate a sampling signal (208) and a modulation unit (102) operatively coupled to the sampling signal generator (202). The modulation unit (102) generates differential pulse width modulated waveforms based on the sampling signal (208) and differential input signals (220-1 and 220-2) such that at least one differential pulse width modulated waveform has a duty cycle equivalent to a pre-determined non-zero minimum pulse width at all values of the differential input signals (220-1 and 220-2).

Abstract: A process for decoding a signal being representative of a Space Time or Frequency Block coding during two signaling periods (STBC) or two parallel channels (SFBC) is provided. The process receives an OFDM signal received from at least one antenna. The process also performs an OFDM demodulation in order to generate N frequency domain representations of the received signal. Then the process performs a decoding process on said OFDM demodulated signal and groups the received signal in word code, Y=(y1, y2), to represent the signal that was received during two signaling periods (STBC) or two parallel channels (SFBC). The word code is then decoded into a matrix after which a lattice reduction algorithm is applied to the matrix in order to transform the matrix into a reduced matrix having a near orthogonal vector. Then it performs a detection process on the reduced matrix to improve noise and interference immunity.

Abstract: Generic devices, systems and methods for multiple radio access technologies (RATs) are described. A platform for allocating radio resources among a plurality of radio access technology (RAT) modules can include, for example, radio hardware configured to transmit and receive radio signals over an air interface using the plurality of RATs; and a radio planner connected to the radio hardware and configured to receive radio time reservation requests, each of which requests includes a priority value for the radio time reservation request, and to determine whether to grant or deny each of the radio time reservation requests based at least in part on the priority values.

Abstract: Method for identifying within an incident signal at least one frequency communication channel, the incident signal being received on a wireless apparatus, comprising determining a power spectral density (PSD) of that incident signal and identifying the at least one channel from the PSD. The PSD determination comprises storing temporal samples of the incident signal received during a predetermined duration and performing a first Discrete Fourier Transform (DFT) processing on the stored samples.

Abstract: A method for performing joint detection includes adjusting a ranking order of codes in a matched filtering result, and a ranking order of column vectors in a system submatrix according to the power. The joint detection is performed using an adjusted matched filtering result and an adjusted system submatrix, and acquires demodulated signals corresponding to the codes. The codes that have high power will be demodulated first. This ensures accuracy of demodulation, inhibits erroneous propagation effect, and improves accuracy of the joint detection.

Abstract: An intermediate symbol buffer (ISB) configuration and method is provided such that the ISB memory comprises 15 portions, one for each HSDPA spreading code. Symbols associated with a spreading code are written to the memory portion associated with the same spreading code. When a covariance calculation is performed to obtain a more accurate channel estimate, only the symbols associated with spreading codes determined to be needed for the covariance calculation are written to the ISB by a buffer block and red from the ISB by a correlation core. The symbols associated with spreading codes that are not necessary for a covariance calculation may be masked from being written or read from the ISB. In some embodiments each memory portion is an individual memory block. In other embodiments a plurality of memory blocks may contain a plurality of memory portions, one memory partition designated, at least temporarily, for each spreading code.

Abstract: A clock signal for electronic circuitry is generated by generating, based on which one of a plurality of application use cases is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points. Based on the electronic circuitry's present speed requirement, a second signal is generated that indicates a second selected one of the clock signal operating points. For any given one of the application use cases, the speed requirement need not remain constant for the duration of the application use case. Based on whichever one of the first and second signals is associated with a higher clock frequency operating point, a third signal is generated that indicates which clock signal operating point (and possibly what voltage level) should be active. The third signal controls generation of a clock (and possibly also voltage level).