Patents Assigned to Eridon Corporation
  • Patent number: 7660923
    Abstract: Methods for configuring an embedded system are described. One method includes connecting a plurality of add-on cards to a circuit board having a programmable processor. The programmable processor is configured to communicate with the plurality of add-on cards. At least one add-on card connects to a circuit board utilizing two or more connectors. The method also includes determining an identifier of each of the plurality of add-on cards, where the identifier of each of the plurality of add-on cards is used to generate a configuration image. Further included is configuring the programmable processor to communicate with the plurality of add-on cards by obtaining the configuration image. In some examples, the programmable processor is an FPGA.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: February 9, 2010
    Assignee: Eridon Corporation
    Inventors: Eric D. Schneider, Gary Nachazel, John Ryan
  • Publication number: 20080228970
    Abstract: Methods for configuring an embedded system are described. One method includes connecting a plurality of add-on cards to a circuit board having a programmable processor. The programmable processor is configured to communicate with the plurality of add-on cards. At least one add-on card connects to a circuit board utilizing two or more connectors. The method also includes determining an identifier of each of the plurality of add-on cards, where the identifier of each of the plurality of add-on cards is used to generate a configuration image. Further included is configuring the programmable processor to communicate with the plurality of add-on cards by obtaining the configuration image. In some examples, the programmable processor is an FPGA.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 18, 2008
    Applicant: Eridon Corporation
    Inventors: Eric D. Schneider, Gary Nachazel, John Ryan
  • Patent number: 7209987
    Abstract: Provided are a method and a system for designing an embedded system using a design process for building a general-purpose computer. Specifically, the embedded system design includes adding and removing add-on cards as needed during the development of the embedded system design. The add-on cards are easily obtainable and connect to a circuit board of the embedded system by selecting lines originating from the circuit board. The lines not selected are passed on to other add-on cards connected to previously connected add-on cards. After all the lines from the circuit board are either selected to connect to logic of the add-on cards or remain unselected, information regarding the add-on cards are used to generate a configuration image. The configuration image is transmitted to a programmable processor of the circuit board to enable communication on the selected lines, thus permitting the embedded system to function.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: April 24, 2007
    Assignee: Eridon Corporation
    Inventors: Eric D. Schneider, Gary Nachazel, John Ryan
  • Patent number: 6901581
    Abstract: An invention is provided for debugging a computer program. Program information is recorded in a trace buffer. The program information generally includes write accesses from the computer program and the execution path of the computer program. In addition, a memory image snapshot of at least a portion of memory being utilized by the computer program is captured. Simulated re-execution of the computer program then occurs by adjusting the state of the memory image snapshot based on the program information. Further, debugging logic can be inserted into a simulated re-execution at particular points in the computer program. In particular, the debugging logic does not change the trace buffer or the memory image snapshot, and as such, do not alter the captured sequence events being debugged.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: May 31, 2005
    Assignee: Eridon Corporation
    Inventor: Eric D. Schneider