Patents Assigned to Esmertec AG
  • Publication number: 20080016507
    Abstract: A computer system which includes a plurality of threads and a garbage collector that traces memory objects and identifies memory objects according to a three-color abstraction. The computer system also includes two methods of deleting compiled code in a self-modifying multi-threaded computer system. The computer system also utilizes a method of handling links between fragments of code in a self-modifying multi-threaded computer system. The computer system also handles patches between two pieces of code.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 17, 2008
    Applicant: ESMERTEC AG
    Inventors: Stephen Thomas, William Charnell, Stephen Darnell, Blaise Dias, Philippa Guthrie, Jeremy Kramskoy, Jeremy Sexton, Michael Wynn, Keith Rautenbach, Wayne Plummer
  • Publication number: 20070271555
    Abstract: The present invention is a new method and apparatus to perform combined compilation and verification of platform independent bytecode instruction listings into optimized machine code. More specifically, the present invention creates a new method and apparatus in which bytecode compilation instructions are combined with bytecode verification instructions, producing optimized machine code on the target system in fewer programming steps than traditionally known. The new method, by combining the steps required for traditional bytecode verification and compilation, increases speed and applicability of platform independent bytecode instructions.
    Type: Application
    Filed: June 8, 2007
    Publication date: November 22, 2007
    Applicant: Esmertec AG
    Inventor: Beat Heeb
  • Patent number: 7263693
    Abstract: The present invention is a new method and apparatus to perform combined compilation and verification of platform independent bytecode instruction listings into optimized machine code. More specifically, the present invention creates a new method and apparatus in which bytecode compilation instructions are combined with bytecode verification instructions, producing optimized machine code on the target system in fewer programming steps than traditionally known. The new method, by combining the steps required for traditional bytecode verification and compilation, increases speed and applicability of platform independent bytecode instructions.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: August 28, 2007
    Assignee: Esmertec AG
    Inventor: Beat Heeb
  • Patent number: 7240341
    Abstract: A method and apparatus for reducing runtime memory requirements of a virtual machine. The invention involves analyzing object code compiled from source code. The object code includes at least two load-units that each contain a load-unit specific constant pool. Each load-unit is analyzed to determine which constants are actual constants and then those actual constants are analyzed to determine where commonality exists among the load-units. If a constant is determined to be redundant it is rewritten to a global constant pool. The references to the constant in the load-unit specific constant pool are rewritten to point to the value in the global constant pool. The memory allocated to the constant in the individual load-unit is then reallocated, either by a programmed routine or by memory management tools.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: July 3, 2007
    Assignee: Esmertec AG
    Inventors: Wayne Plummer, Jerry Kramskoy
  • Patent number: 7207036
    Abstract: A solution to avoid performance degradation associated with load-object independence by arranging interface source code, particurlarly JNI source code, in a stylized form, and then preprocessing the stylized interface source code into a Virtual Machine (“VM”) specific form. The stylized source code allows a preprocessor to identify and track field and method identifiers, and to match up the field and method uses with the specification of the field or method. The source code is stylized by substituting stylized variable names, each with a native element identifier, for non-stylized variables.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: April 17, 2007
    Assignee: Esmertec AG
    Inventor: William Charnell
  • Patent number: 7080366
    Abstract: A dynamic compiler and method of compiling code to generate a dominate path and handle exceptions. The dynamic compiler includes an execution history recorder that is configured to record the number of times a fragment of code is interpreted. When the code is interpreted a threshold number of times, the code is queued for compilation. The execution history recorder also keeps track of where transfer of control came from and where transfer of control goes to for each fragment of code that is executed, thereby allowing for compilation of a dominant path of code. If the execution of code deviates from the dominant path of compiled code (such as when an exception occurs), a fallback interpreter is utilized to interpret the fragment of code to be executed.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: July 18, 2006
    Assignee: Esmertec AG
    Inventors: Jeremy Paul Kramskoy, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Wayne Plummer, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Stephen Paul Thomas
  • Patent number: 7069549
    Abstract: A method and system multi-threaded fragment patching. The method provides a link in a self-modifying multi-threaded computer system between a first and a second piece of compiled code where the first piece of compiled code includes a control transfer instruction to the second piece of compiled code. The link is formed by inserting a patch from the first piece of compiled code to the second piece of compiled code. The patch may be a direct reference or a reference to an outlier.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: June 27, 2006
    Assignee: Esmertec AG
    Inventors: William Thomas Charnell, Wayne Plummer, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenbach, Stephen Paul Thomas
  • Patent number: 7058929
    Abstract: A system and method of direct invocation of Methods using class loaders. The method includes compiling a call to and a Method of a first class (assuming that the Method is final), determining whether the second class includes an instance of the Method of the first class, determining whether the instance of the Method of the second class overrides the Method of the first class, and altering the compiled code of the Method of the first class if the instance of the Method of the second class overrides the Method of the first class.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: June 6, 2006
    Assignee: Esmertec AG
    Inventors: William Thomas Charnell, Wayne Plummer, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenbach, Stephen Paul Thomas
  • Patent number: 7058669
    Abstract: A method and system of increasing the speed of a write barrier check. Instead of using zero null references, in one embodiment of the invention a special object is created at a valid and globally accessible location in memory. The special object is colored black, and the valid location of the special object is used in objects linked lists, and other elements whenever a null value is required. Preferably, the special object is colored black by coloring a bit pattern in a header of the special object to represent black.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: June 6, 2006
    Assignee: Esmertec AG
    Inventor: Stephen Thomas
  • Patent number: 7039738
    Abstract: A method and system for handling device driver interrupts in a computer system. An interrupt handling Method is initiating prior to the occurrence of any interrupts in the computer system. The interrupt handling Method is executed to a waiting state, and execution is then resumed when an interrupt occurs. When an interrupt is detected control is transferred to the operating system and the interrupt is dismissed.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: May 2, 2006
    Assignee: Esmertec AG
    Inventors: Wayne Plummer, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Stephen Paul Thomas
  • Patent number: 7007005
    Abstract: A method and structure for reducing search times. The method includes examining the entries in a list in turn beginning with the entry pointed to by a start pointer and continuing until the particular entry is found. The start pointer is then reset to point at the particular entry that was found. The next search will therefore begin to search at the location where the last search ended. Such a strategy increases the likelihood of locating the particular entry faster. The list of entries includes next entry pointers that point to another entry in the list such that the next entry pointers together form a closed loop. If the entire list is searched and the particular entry is not found, the search is aborted.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: February 28, 2006
    Assignee: Esmertec AG
    Inventors: Keith Rautenback, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Wayne Plummer, Stephen Paul Thomas
  • Patent number: 6978451
    Abstract: The present invention is a new method and apparatus to perform fast compilation of platform independent bytecode instruction listings into high quality machine code in a single sequential pass. More specifically, the present invention creates a new method and apparatus for the translation of platform neutral bytecode into high quality machine code in a single sequential pass in which information from the preceding instruction translation is used to mimic an optimizing compiler without the extensive memory and time requirements. Where the preceding instruction translation cannot be used due to no direct control flow, information from comprehensive stack maps is then used.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: December 20, 2005
    Assignee: Esmertec AG
    Inventor: Beat Heeb
  • Patent number: 6976254
    Abstract: A bytecode execution system and method for increasing the execution speed of invoking and returning from Methods while minimizing the memory footprint required to support this. The system includes a virtual machine with a class loader and an interpreter or, alternatively, a hardware accelerator. Speed and memory enhancements are realized by establishing an activation stack frame template with a set of criteria. Each Method from subject code is examined to determine whether the Method conforms to the criteria of the stack frame template. If the Method conforms, an activation frame for that Method based on the activation stack frame template is created when the Method is invoked. Otherwise, an activation frame based on standard virtual machine criteria is created. An access structure is associated with each Method and a Method routing structure is created for each class.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: December 13, 2005
    Assignee: Esmertec AG
    Inventor: Jeremy Paul Kramskoy
  • Patent number: 6964039
    Abstract: The present invention is a new method and apparatus to perform combined compilation and verification of platform independent bytecode instruction listings into optimized machine code. More specifically, the present invention creates a new method and apparatus in which bytecode compilation instructions are combined with bytecode verification instructions, producing optimized machine code on the target system in fewer programming steps than traditionally known. The new method, by combining the steps required for traditional bytecode verification and compilation, increases speed and applicability of platform independent bytecode instructions.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: November 8, 2005
    Assignee: Esmertec AG
    Inventor: Beat Heeb
  • Patent number: 6944637
    Abstract: A method and apparatus for reducing memory requirements in a computing environment. The method includes reducing the size of a header for a data structure by creating a header consisting of index information. Alternatively, the header may also include garbage collection information. The invention also provides a data structure for an object-oriented programming environment. The data structure includes: 1) a header consisting of index information and 2) one or more fields. Unlike prior data structures the header does not include information regarding the data structure's size; where it references are; it dispatch table; hash code information; or monitor information.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: September 13, 2005
    Assignee: Esmertec AG
    Inventor: Stephen Darnell
  • Patent number: 6925637
    Abstract: A method and system of carrying out garbage collection in a computer system. Specifically, the method and system utilize low contention grey object sets for concurrent marking garbage collection. A garbage collector traces memory objects and identifies memory objects according to a three-color abstraction, identifying a memory object with a certain color if that memory object itself has been encountered by the garbage collector, but some of the objects to which the memory object refers have not yet been encountered. A packet manager organizes memory objects identified with the certain color into packets, provides services to obtain empty or partially full packets, and obtain full or partially full packets, and verifies whether a packet of the certain color is being accessed by one of the threads of the garbage collector.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: August 2, 2005
    Assignee: Esmertec AG
    Inventors: Stephen Paul Thomas, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Wayne Plummer
  • Patent number: 6901587
    Abstract: A method and a system of cache management using spatial separation of outliers. The system includes a dynamic compiler arranged to create compiled fragments of code having dominant code blocks and outliers. Memory coupled to the dynamic compiler is managed by a compiler manager such that dominant code blocks are stored in one portion of the memory and the outliers are stored in another portion of the memory. Storing the dominant path code separate from the outliers increases efficiency of the system.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: May 31, 2005
    Assignee: Esmertec AG
    Inventors: Jeremy Paul Kramskoy, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Wayne Plummer, Jeremy James Sexton, Michael John Wynn, Keith Rautenbach, Stephen Paul Thomas
  • Patent number: 6862728
    Abstract: A hash table dispatch mechanism for interface Methods. The mechanism reduces dispatch times during the execution of an object-oriented language program. An interface hash table having a pointer as an index for either a specific location in a corresponding dispatch table or an interface Method of the program is created for a dispatch table. The interface hash table has an address and a plurality of slots having a hash value related to an interface Method. The mechanism includes a recovery Method for resolving conflicts when two or more slots in the interface hash table contain clashing values.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: March 1, 2005
    Assignee: Esmertec AG
    Inventors: Stephen Darnell, William Thomas Charnell, Wayne Plummer, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Stephen Paul Thomas
  • Patent number: 6766513
    Abstract: A method and a system of memory management using stack walking. The method of managing memory in a computer system includes identifying compiled code to be deleted, examining the return addresses of the frames in the stack, determining whether any of the return address of the frames are in the range of addresses of the compiled code to be deleted, and if they are, then altering the contents of the frame determined to have a return address in the range of addresses of the compiled code to be deleted.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: July 20, 2004
    Assignee: Esmertec AG
    Inventors: William Thomas Charnell, Wayne Plummer, Stephen Darnell, Blaise Abel Alec Dias, Philippa Joy Guthrie, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Stephen Paul Thomas
  • Patent number: 6691303
    Abstract: A method and system of testing and verifying computer code in a multi-threaded environment. The method includes testing a first piece of computer code that is an implementation of a specification against a second piece of computer code that is a different implementation of the specification. Corresponding synchronization points in the first and second pieces of code are defined and the first piece of code is executed to the first synchronization point of the first piece of code. A state message is generated and sent to the second piece of code. The second piece of code is executed to the first synchronization point of the second piece of code and then a state after message is generated and compared to the state before message. The synchronization points are generally selected from a group including conditional transfers of control, Method calls, Method returns, and backward transfers of control.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: February 10, 2004
    Assignee: Esmertec AG
    Inventors: Philippa Joy Guthrie, William Thomas Charnell, Stephen Darnell, Blaise Abel Alec Dias, Wayne Plummer, Jeremy Paul Kramskoy, Jeremy James Sexton, Michael John Wynn, Keith Rautenback, Stephen Paul Thomas