Patents Assigned to ET International, Inc.
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Patent number: 10620988Abstract: A distributed computing system may incorporate an implementation based on a codelet-based execution model, where a codelet is a high-level dataflow element. In addition to supporting the use of codelets, the system may further provide support for “datalets,” which are an extension of codelets providing better built-in support for static dataflow programming. Such a distributed computing system, implementing computing based on such codelets, may incorporate an implementation of an execution model, locality management schemes, scheduling schemes, a type system, and/or management of heterogeneous systems.Type: GrantFiled: December 16, 2011Date of Patent: April 14, 2020Assignee: ET International, Inc.Inventors: Christopher G. Lauderdale, Rishi L. Khan
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Patent number: 9542231Abstract: The present invention, known as runspace, relates to the field of computing system management, data processing and data communications, and specifically to synergistic methods and systems which provide resource-efficient computation, especially for decomposable many-component tasks executable on multiple processing elements, by using a metric space representation of code and data locality to direct allocation and migration of code and data, by performing analysis to mark code areas that provide opportunities for runtime improvement, and by providing a low-power, local, secure memory management system suitable for distributed invocation of compact sections of code accessing local memory. Runspace provides mechanisms supporting hierarchical allocation, optimization, monitoring and control, and supporting resilient, energy efficient large-scale computing.Type: GrantFiled: April 13, 2011Date of Patent: January 10, 2017Assignee: ET International, Inc.Inventors: Rishi L. Khan, Daniel Orozco, Guang R. Gao
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Publication number: 20160306817Abstract: Data storage in a distributed computing system may involve the implementation of key/value stores across multiple storage structures of the distributed computing system, where a key may represent an index and a value may represent an object to store and/or retrieve. A given key/value store may be accessed by multiple compute nodes of the distributed computing system. Duplication and/or versioning may be implemented in or across one or more of the key/value stores.Type: ApplicationFiled: April 27, 2015Publication date: October 20, 2016Applicant: ET International, Inc.Inventors: Brian E. HEILIG, Guang R. GAO, Brian PHILLIPS, Adam MARKEY
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Publication number: 20150244558Abstract: A data processing task may be implemented in a distributed computing system by the use of a workflow broken into flowlets that are arranged in a directed acyclic graph between data sources and data sinks. Such an arrangement may include various flow control and/or fault tolerance schemes, among other features. Fault tolerance may be implemented using key/value store (KVS) flowlets.Type: ApplicationFiled: April 17, 2015Publication date: August 27, 2015Applicant: ET INTERNATIONAL, INC.Inventors: John TULLY, Brian E. HEILIG, Guang R. GAO
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Publication number: 20140115596Abstract: Codeletset methods and/or apparatus may be used to enable resource-efficient computing. Such methods may involve decomposing a program into sets of codelets that may be allocated among multiple computing elements, which may enable parallelism and efficient use of the multiple computing elements. Allocation may be based, for example, on efficiencies with respect to data dependencies and/or communications among codelets.Type: ApplicationFiled: August 25, 2011Publication date: April 24, 2014Applicant: ET International, Inc.Inventors: Rishi L. Khan, Daniel Orozco, Guang R. Gao, Kelly Livingston
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Publication number: 20140108489Abstract: A data processing task may be implemented in a distributed computing system by the use of a workflow broken into flowlets that are arranged in a directed acyclic graph between data sources and data sinks. Such an arrangement may include various flow control and/or fault tolerance schemes, among other features.Type: ApplicationFiled: October 15, 2013Publication date: April 17, 2014Applicant: ET INTERNATIONAL, INC.Inventors: Mark Glines, Brian Heilig, Rishi Lee Khan, Christopher Galen Lauderdale, Adam Markey, Brian Phillips, Robert Coleman Springer, IV, Joel Denny
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Publication number: 20130060556Abstract: A chip-level multiprocessing system may be designed for accelerated implementation of a specified user computing application. The application may be converted to a parallel program representation with explicit runtime functions denoted. One or more of the explicit runtime functions may be identified for implementation in the form of a specialized intellectual property core (IP-core). The remaining portions of the application may then be implemented in a further IP-core, and the IP-cores may be interconnected to implement the user computing application.Type: ApplicationFiled: July 13, 2012Publication date: March 7, 2013Applicant: ET International, Inc.Inventor: Guang R. GAO
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Patent number: 8365111Abstract: An apparatus and method may be used for compiling a hardware logic design into data-driven logic programs to be executed on a data-driven chip. The apparatus may include storage with a library for defining a net-list synthesized by a synthesis tool. The apparatus may also include a data-driven logic verification chip comprising a plurality of logic processors. The apparatus may further include a code generator for adopting heuristics to convert the net-list into data driven logic programs and for allocating hardware resources to balance computing and storage loads across the plurality of logic processors of the verification chip.Type: GrantFiled: February 25, 2009Date of Patent: January 29, 2013Assignee: ET International, Inc.Inventors: Fei Chen, Guang R. Gao
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Patent number: 8341568Abstract: Methods and systems for simulating logic may translate logic design into executable code for a multi-processor based parallel logic simulation device. A system may implement one or more parallel execution methods, which may include IPMD, MPMD, and/or DDMT.Type: GrantFiled: July 21, 2010Date of Patent: December 25, 2012Assignee: ET International, Inc.Inventors: Fei Chen, Guang R. Gao
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Publication number: 20120158817Abstract: A distributed computing system may incorporate an implementation of an execution model, locality management schemes, scheduling schemes, a type system, and/or management of heterogeneous systems.Type: ApplicationFiled: December 16, 2011Publication date: June 21, 2012Applicant: ET INTERNATIONAL, INC.Inventors: Christopher G. Lauderdale, Rishi L. Khan
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Publication number: 20110289507Abstract: The present invention, known as runspace, relates to the field of computing system management, data processing and data communications, and specifically to synergistic methods and systems which provide resource-efficient computation, especially for decomposable many-component tasks executable on multiple processing elements, by using a metric space representation of code and data locality to direct allocation and migration of code and data, by performing analysis to mark code areas that provide opportunities for runtime improvement, and by providing a low-power, local, secure memory management system suitable for distributed invocation of compact sections of code accessing local memory. Runspace provides mechanisms supporting hierarchical allocation, optimization, monitoring and control, and supporting resilient, energy efficient large-scale computing.Type: ApplicationFiled: April 13, 2011Publication date: November 24, 2011Applicant: ET International, Inc.Inventors: Rishi L. Khan, Daniel Orozco, Guang R. Gao
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Publication number: 20110246823Abstract: Node-centric checkpointing may be used in a multi-node computing system to provide fault-tolerance. Such checkpointing may involve storage of input and/or output data prior to and/or after execution of a task on a node.Type: ApplicationFiled: April 5, 2011Publication date: October 6, 2011Applicant: ET International, Inc.Inventors: Rishi L. Khan, Guang R. Gao, Apperson H. Johnson
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Patent number: 7934179Abstract: Methods and systems for simulating logic may translate logic design into executable code for a multi-processor based parallel logic simulation device. A system may implement one or more parallel execution methods, which may include IPMD, MPMD, and/or DDMT.Type: GrantFiled: November 9, 2007Date of Patent: April 26, 2011Assignee: ET International, Inc.Inventors: Guang R. Gao, Fei Chen
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Publication number: 20100286976Abstract: Methods and systems for simulating logic may translate logic design into executable code for a multi-processor based parallel logic simulation device. A system may implement one or more parallel execution methods, which may include IPMD, MPMD, and/or DDMT.Type: ApplicationFiled: July 21, 2010Publication date: November 11, 2010Applicant: ET INTERNATIONAL, INC.Inventors: Guang R. Gao, Fei Chen
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Publication number: 20090222252Abstract: An apparatus and method may be used for compiling a hardware logic design into data-driven logic programs to be executed on a data-driven chip. The apparatus may include storage with a library for defining a net-list synthesized by a synthesis tool. The apparatus may also include a data-driven logic verification chip comprising a plurality of logic processors. The apparatus may further include a code generator for adopting heuristics to convert the net-list into data driven logic programs and for allocating hardware resources to balance computing and storage loads across the plurality of logic processors of the verification chip.Type: ApplicationFiled: February 25, 2009Publication date: September 3, 2009Applicant: ET International, Inc.Inventors: Fei Chen, Guang R. Gao
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Publication number: 20080294411Abstract: Methods and systems for simulating logic may translate logic design into executable code for a multi-processor based parallel logic simulation device. A system may implement one or more parallel execution methods, which may include IPMD, MPMD, and/or DDMT.Type: ApplicationFiled: November 9, 2007Publication date: November 27, 2008Applicant: ET INTERNATIONAL, INC.Inventors: Guang R. Gao, Fei Chen