Abstract: A random access memory (RAM) comprises memory cells each including an RS type flip-flop having complementary data inputs and transistors for forcing the flip-flop by that one of two data wires which is at a given level (high level for example) when a selection wire is at a first given level (high level for example). The flip-flop is connected to an output wire by circuitry for maintaining the output wire at the high level as long as the selection wire is at the first level and for causing the output wire to take the level corresponding to the condition of the flip-flop when the selection wire is brought to the other level. The transistors are preferably N-MOS for higher speed.