Abstract: A simultaneous read and write memory is shown. The memory is configured into a plurality of sections. Connected to each section is a wordline multiplexer which is used to select a wordline for reading or writing. A write wordline decoder and a read wordline decoder are each connected to all the wordline multiplexers. The multiplexers choose either a write wordline or a read wordline independently for each memory section. A write data path and a read data path are separately connected to each of the memory sections. With the separate write and read wordline addressing and the separate data paths for reading and writing, one section can be written simultaneous to the reading from a second section.