Abstract: A method is described of wireless transmission of data onto a data carrier, in particular onto a chip card or IC card, by said data carrier being placed in a high-frequency field. To carry out amplitude keying, the field is switched on and off, with the information being here the number of periods transmitted between two transmission intervals. The semiconductor circuit accommodated in the data carrier receives its clock from the received high-frequency field or from an oscillator allocated to the semiconductor circuit, with this clock being off during a transmission gap.

Abstract: The invention relates to a one-time-programmable read-only memory cell, abbreviated as PROM. According to the prior art, PROM cells are programmed by the deliberate destruction of a component. Since the information is burnt into the memory cell in this way, a PROM cell can only be programmed once. If read-only memory cells are to be electrically programmed and cleared several times, floating gate transistors in particular are used. With the floating gate transistor, the information is stored as a charge on a completely insulated gate electrode. If PROM and EEPROM memory cells are now integrated on a common chip, this requires additional circuitry due to the different voltage requirements of the two different memory cells. In accordance with the invention, a repeatedly electrically programmable read-only memory is connected such that it can only be electrically programmed once.

Abstract: A semiconductor array in a CMOS technology is described in which the gate electrodes are of p.sup.+ -doped polysilicon in the case of p-channel transistors and of n.sup.+ -doped polysilicon in the case of n-channel transistors. If the gate electrodes of two complementary transistors are connected at the gate level, a polysilicon diode is created at the connection point. In accordance with the invention, the polysilicon diode is short-circuited with a polysilicide layer. A method is described for short-circuiting this polysilicon diode without additional masking steps using a metal silicide layer. In a further embodiment of the invention, the silicide is restricted to the area of the polysilicon diode. In addition, a method is described using which the polysilicon diodes can be short-circuited in a self-adjusting polysilicide process.

Abstract: The invention relates to a method and a circuit array for regulating the supply voltage of a load as may be found, for example, in the form of an integrated circuit in a chip card. An integrated circuit of this type contains a non-volatile memory and the control logic needed to read out the information stored in the non-volatile memory, but with the transmission of both energy and data being wireless, for example inductive. Data is transmitted by suitable modulation of the voltage supply. In order for the reader to clearly evaluate the read-out logic states, it is proposed in accordance with the invention that during output of the first logic level the supply voltage of the load is generated by serial regulation and that during output of the second logic level the terminal voltage of the voltage source is under parallel regulation.

Abstract: The invention relates to a circuit array for operating a liquid-crystal display in the time-division multiplexing mode, the display having at least one backplane and several segments. The circuit array includes a microprocessor having a first pulse generator, a shift register array storing data signals supplied to the circuit array, this shift register array having a number of stages corresponding to the number of segments, and driving stages which generate segment pulse sequences for the segments in accordance with the supplied data signals. In accordance with the invention, the microprocessor supplies the data signals to the shift register array via a first interface, the shift register array being designed as a cyclic shift register with each register point of the shift register array being clearly allocated to a segment. In addition, the microprocessor supplies control data, particularly data determining the time multiplexing rate, to a second interface having a decoder.

Abstract: A current having a high negative temperature coefficient can be tapped from a current source circuit connected as a loop out of two current mirror circuits and having a resistor. Furthermore, a current source circuit of this type made with CMOS technology has a high current requirement. The invention permits a reduction of these drawbacks by replacing the resistor with a connected capacitor.

Abstract: The invention relates to a voltage multiplying circuit having several stages, with each stage having a pumping capacitor and several MOS switching transistors. The switching transistors are so controlled by clock signals that the charge of a pumping capacitor of one stage is transferred to the pumping capacitor of the following stage. Operation of a circuit of this type with operating voltages substantially lower than 5 V entails considerable drawbacks. In accordance with the invention, therefore, each stage of a voltage multiplying circuit of this type is fitted with an additional transistor and an additional correction capacitor. As a result, the circuit in accordance with the invention is suppliable with an operating voltage of 2 V, for example. In another circuit arrangement, the transistors of the last two or three stages of the voltage multiplying circuit are of one conductivity type, while the transistors of the previous stages are of the opposite conductivity type.

Abstract: The invention relates to an electrically erasable floating-gate memory cell (EEPROM) in which the Fowler-Nordheim tunnel effect is exploited for programming and erasing. In accordance with the invention, a trench adjacent to the side of the drain zone facing away from the channel zone and covered with a dielectric tunnel layer is provided in the semiconductor element, so that the floating-gate electrode extends into the trench in such a way that the tunnel current can flow horizontally to the semiconductor surface between the drain zone and the floating-gate electrode. This permits a reduction in the cell size and to higher integration densities. Preferably the floating gate electrodes of at least two cells extend into a single trench.

Abstract: An electronic music signal generator digitally stores amplitude values representing a complex wave in a number of different memories. By reading out the stored values, under control of a clock circuit, and superimposing them in various ways various effects such as decay can be produced to achieve either single toned or multi-toned sounds closely simulating the sound impression created by mechanical musical instruments.