Abstract: In a dynamic memory for capacitive data storage, enhanced storage performances are achieved by increasing the value of the storage capacitance. A junction capacitor is formed between the source region and the well region in which the memory cells are formed, the junction capacitor being associated with a conventional capacitor. By judiciously and heavily doping the wells, the junction capacitances are appreciably increased. The heavy-doping operation is performed by backward implantation of the wells at very high energy in order to place the concentration peak of the wells at the depth of the base of the thick oxides which form separations between memory cells.

Abstract: A micromodule or chip carrier package for chip containing components has an insulating support base for carrying a series of flush-mounted contact areas. A semiconductor circuit or chip is placed on one of the contact areas and the chip is connected to the other contact areas by means of wires. A hollow case is mounted over the assembly and has a bore for receiving a drop of resin which has the function of protecting the semiconductor circuit or chip.

Abstract: A device for neutralizing the access to an integrated-circuit zone to be protected. A fuse section providing a connection between an access terminal and an integrated circuit zone to be protected is connected by means of the fuse end portion located nearest the zone to be protected to a junction obtained at the intersection of a layer of a conductivity type opposite to the conductivity type in which the substrate of the integrated circuit is formed. This junction is reverse-biased during normal utilization of the circuit and forward-biased only when it is desired to melt the fuse, thus making the zone to be protected irreversibly inaccessible.

Abstract: An electrically programmable ROM is provided for avoiding frauds by producing, internally in the memory, the different potentials which it uses for verifying the memory points chosen. The verification of writing of information in a point is obtained by subjecting this point to a calibrated selection voltage, to which an external operator cannot have access. This calibrated voltage is produced by a multiplying generator. This latter feeds into one or more calibrators for producing all the useful voltages. Reading and writing orders are then given to a switching circuit which causes the corresponding application of these calibrated voltages. An external operator cannot enter in the memory level falsified signals for modifying the meaning of the contents of the recorded information.

Abstract: A card having contact pads disposed in rows and spaced in accordance with electronic card standards is provided with a recess for snap-action engagement of a pluggable micromodule having side contacts and containing the core component of the card. The micromodule is connected to the rows of contact pads by means of transfer contacts formed by metallic strips and side contacts within the card recess.

Abstract: An electronic card which can be reused a large number of times incorporates a semiconductor circuit provided with an area which is erasable by means of electromagnetic radiation within the ultraviolet range of wavelengths. The externally-emitted ultraviolet radiation applied to the semiconductor circuit via a card recess passes through a quartz window and impinges on the erasable area.

Abstract: The invention provides integrated circuit memories with repair circuits. These repair circuits allow redundant memory cell lines to be substituted for defective cell lines. The invention takes advantage of the existence of these substitution circuits for electrically, and no longer only functionally, decoupling the defective lines. A connection connects circuits for biasing the cell lines to the repair circuit of this line. When the line is repaired (i.e. neutralized) it is automatically unbiased.

Abstract: An integrated circuit memory is provided in which a repair circuit allows a redundant cell line to be substituted for a cell line which has proved defective. In the invention, access is had to the repair circuit by using the properties of the decoder of the memory. An instruction for decomposing a fuse is given, for all the repair circuits of the memory, through a single external terminal conected to a connection which serves all the repair circuits. When the fuse is decomposed, a bistable circuit changes state and switches the cell lines.