Patents Assigned to Examiner for examination.
  • Publication number: 20030107048
    Abstract: Provided is a diode circuit with small power consumption. A first voltage comparator (4) compares a voltage at a cathode terminal (101) with a sum of a voltage at an anode terminal (102) and a voltage across a first voltage source (10) to output a reset signal, and a second voltage comparator (5) compares a voltage at the anode terminal (102) with a sum of a voltage at the cathode terminal (101) and a voltage across the second voltage source (11) to output a set signal. A first latch circuit (20) outputs an L signal when the reset signal from the first voltage comparator (4) is inputted, and outputs an H signal when the set signal from the second voltage comparator (5) is inputted. An n-channel MOS transistor (2) turns off upon receiving the L signal, and turns on upon receiving the H signal, to thereby limit an output current.
    Type: Application
    Filed: November 18, 2002
    Publication date: June 12, 2003
    Applicant: Examiner for examination.
    Inventor: Takao Nakashimo