Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized and pipelined processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement market making strategies that post and cancel quotes on markets. These logic resources can include logic for scheduling the transmissions of quotes to the markets according to various criteria.

Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement aggressing strategies to place aggressing orders on markets when defined conditions are met. Further still, the aggressing strategies can be driven by low latency derivative pricing.

Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books and price books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order and price books.

Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform. The data packets processed through the intelligent switch can be unreliable datagram protocol (UDP) data packets from multiple feeds of financial market data, and the offloaded processing can include line arbitration, gap detection, and/or gap mitigation of redundant copies of UDP data packets from one or more financial market data feeds.

Abstract: Systems and method are disclosed for distributed data processing across multiple compute resources. For example, the system may comprise a ticker plant configured to receive streaming financial market data events from a plurality of feeds, the events comprising financial market data pertaining to financial instruments. The ticker plant may comprise a processor, an FPGA, and a shared memory, wherein the shared memory is shared between the processor and the FPGA, wherein the processor is configured to execute software to manage a flow of financial market data derived from the streaming events between the processor and the FPGA via DMA transfers of the financial market data between the processor and the FPGA via the shared memory, and wherein the FPGA comprises reconfigurable hardware that is configured to perform processing operations on the financial market data to generate processed financial market data for delivery to data consumers.

Abstract: An integrated order management engine is disclosed that reduces the latency associated with managing multiple orders to buy or sell a plurality of financial instruments. Also disclosed is an integrated trading platform that provides low latency communications between various platform components. Such an integrated trading platform may include a trading strategy offload engine.

Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books and price books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order and price books.

Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). For example, an estimation that estimates a quote price direction for a quote on a financial instrument can be generated from streaming financial market data.

Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized and pipelined processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement canceling strategies to cancel quotes and/or orders on markets when defined conditions are met. For example, if new trades indicate that existing quotes and/or orders are no longer advantageous, the logic resources can act quickly to cancel those quotes and/or orders.

Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). For example, a liquidity indicator that indicates a presence of a hidden order for a financial instrument can be generated based on processing of streaming financial market data that operates to detect the existence of hidden orders within the financial market data.

Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized and pipelined processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement aggressing strategies to place aggressing orders on markets when defined conditions are met. Further still, the aggressing strategies can be driven by low latency derivative pricing.

Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Abstract: An integrated order management engine is disclosed that reduces the latency associated with managing multiple orders to buy or sell a plurality of financial instruments. Also disclosed is an integrated trading platform that provides low latency communications between various platform components. Such an integrated trading platform may include a trading strategy offload engine.

Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). Examples of trading signals that can be computed in this fashion include a liquidity indicator that indicates a presence of a reserve order for a financial instrument, a liquidity estimation that estimates an amount of hidden liquidity for a financial instrument, a quote price stability estimation that estimates a duration of time for which a price quote for a financial instrument will be valid, and/or a quote price direction estimation that estimates whether the price in a next quote for a financial instrument will be higher or lower than the price for that financial instrument in the current quote.

Abstract: Systems and methods are disclosed for routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, a field programmable gate array (FPGA), a shared memory that is shared by a user space of an operating system for the processor and the FPGA, a network protocol stack, and driver code for execution by the processor. The driver code can be configured to (1) make the received streaming data available to a user mode software application for processing, (2) make data stored in the shared memory available to the FPGA via DMA transfers of data from the shared memory into the FPGA for processing thereby, (3) receive a stream of processed data from the FPGA, and (4) provide the received processed data to the network protocol stack for delivery to one or more data consumers.

Abstract: A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) process streaming financial market data, the streaming financial market data comprising a plurality of messages representative of a plurality of offers to buy and sell a plurality of financial instruments, and (2) maintain in real-time a plurality of financial instrument order books based on the messages.

Abstract: Various techniques are disclosed for distributing data, particularly real-time data such as financial market data, to data consumers at low latency. Exemplary embodiments include embodiments that employ adaptive data distribution techniques and embodiments that employ a multi-class distribution engine.

Abstract: Disclosed herein is a method and apparatus for hardware-accelerating various data quality checking operations. Incoming data streams can be processed with respect to a plurality of data quality check operations using offload engines (e.g., reconfigurable logic such as field programmable gate arrays (FPGAs)). Accelerated data quality checking can be highly advantageous for use in connection with Extract, Transfer, and Load (ETL) systems.

Abstract: An encryption technique is disclosed for encrypting a plurality of data blocks of a data segment where the encryption selectively switches between a blockwise independent randomized (BIR) encryption mode and a cipher block chaining (CBC) encryption mode based on a configurable feedback stride. A corresponding decryption technique is also disclosed.

Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) process each received financial market data message to update a stored record for the financial instrument associated with that message.