Patents Assigned to Exegy Incorporated
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Patent number: 11803912Abstract: An integrated order management engine is disclosed that reduces the latency associated with managing multiple orders to buy or sell a plurality of financial instruments. Also disclosed is an integrated trading platform that provides low latency communications between various platform components. Such an integrated trading platform may include a trading strategy offload engine.Type: GrantFiled: July 25, 2022Date of Patent: October 31, 2023Assignee: Exegy IncorporatedInventors: David Taylor, Scott Parsons
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Patent number: 11676206Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books and price books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order and price books.Type: GrantFiled: February 22, 2021Date of Patent: June 13, 2023Assignee: Exegy IncorporatedInventors: David E. Taylor, Scott Parsons, Jeremy Walter Whatley, Richard Bradley, Kwame Gyang, Michael DeWulf
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Patent number: 11631135Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized and pipelined processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement canceling strategies to cancel quotes and/or orders on markets when defined conditions are met. For example, if new trades indicate that existing quotes and/or orders are no longer advantageous, the logic resources can act quickly to cancel those quotes and/or orders.Type: GrantFiled: February 16, 2022Date of Patent: April 18, 2023Assignee: Exegy IncorporatedInventors: Timothy Gorham, David Edward Taylor, Jeremy Walter Whatley
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Patent number: 11631136Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). For example, an estimation that estimates a quote price direction for a quote on a financial instrument can be generated from streaming financial market data.Type: GrantFiled: February 28, 2022Date of Patent: April 18, 2023Assignee: Exegy IncorporatedInventors: David Edward Taylor, Andy Young Lee, David Vincent Schuehler
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Patent number: 11562430Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). For example, a liquidity indicator that indicates a presence of a hidden order for a financial instrument can be generated based on processing of streaming financial market data that operates to detect the existence of hidden orders within the financial market data.Type: GrantFiled: February 28, 2022Date of Patent: January 24, 2023Assignee: Exegy IncorporatedInventors: David Edward Taylor, Andy Young Lee, David Vincent Schuehler
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Patent number: 11551302Abstract: Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized and pipelined processing operations to improve tick to trade latency. As an example, logic resources for the automated trading engine can implement aggressing strategies to place aggressing orders on markets when defined conditions are met. Further still, the aggressing strategies can be driven by low latency derivative pricing.Type: GrantFiled: February 16, 2022Date of Patent: January 10, 2023Assignee: Exegy IncorporatedInventors: Timothy Gorham, David Edward Taylor, Jeremy Walter Whatley
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Patent number: 11436672Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.Type: GrantFiled: March 3, 2014Date of Patent: September 6, 2022Assignee: Exegy IncorporatedInventors: Scott Parsons, David E. Taylor, Ronald S. Indeck
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Patent number: 11397985Abstract: An integrated order management engine is disclosed that reduces the latency associated with managing multiple orders to buy or sell a plurality of financial instruments. Also disclosed is an integrated trading platform that provides low latency communications between various platform components. Such an integrated trading platform may include a trading strategy offload engine.Type: GrantFiled: July 25, 2018Date of Patent: July 26, 2022Assignee: EXEGY INCORPORATEDInventors: David Taylor, Scott Parsons
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Patent number: 11263695Abstract: Systems and methods are disclosed herein that compute trading signals with low latency and high throughput using highly parallelized compute resources such as integrated circuits, reconfigurable logic devices, graphics processor units (GPUs), multi-core general purpose processors, and/or chip multi-processors (CMPs). Examples of trading signals that can be computed in this fashion include a liquidity indicator that indicates a presence of a reserve order for a financial instrument, a liquidity estimation that estimates an amount of hidden liquidity for a financial instrument, a quote price stability estimation that estimates a duration of time for which a price quote for a financial instrument will be valid, and/or a quote price direction estimation that estimates whether the price in a next quote for a financial instrument will be higher or lower than the price for that financial instrument in the current quote.Type: GrantFiled: May 14, 2020Date of Patent: March 1, 2022Assignee: Exegy IncorporatedInventors: David Edward Taylor, Andy Young Lee, David Vincent Schuehler
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Patent number: 11182856Abstract: Systems and methods are disclosed for routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, a field programmable gate array (FPGA), a shared memory that is shared by a user space of an operating system for the processor and the FPGA, a network protocol stack, and driver code for execution by the processor. The driver code can be configured to (1) make the received streaming data available to a user mode software application for processing, (2) make data stored in the shared memory available to the FPGA via DMA transfers of data from the shared memory into the FPGA for processing thereby, (3) receive a stream of processed data from the FPGA, and (4) provide the received processed data to the network protocol stack for delivery to one or more data consumers.Type: GrantFiled: October 22, 2020Date of Patent: November 23, 2021Assignee: Exegy IncorporatedInventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
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Patent number: 8478680Abstract: A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) process streaming financial market data, the streaming financial market data comprising a plurality of messages representative of a plurality of offers to buy and sell a plurality of financial instruments, and (2) maintain in real-time a plurality of financial instrument order books based on the messages.Type: GrantFiled: March 31, 2011Date of Patent: July 2, 2013Assignee: Exegy IncorporatedInventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
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Publication number: 20130159449Abstract: Various techniques are disclosed for distributing data, particularly real-time data such as financial market data, to data consumers at low latency. Exemplary embodiments include embodiments that employ adaptive data distribution techniques and embodiments that employ a multi-class distribution engine.Type: ApplicationFiled: April 5, 2012Publication date: June 20, 2013Applicant: EXEGY INCORPORATEDInventors: David E. Taylor, Scott Parsons, David Vincent Schuehler, Todd Alan Strader, Ryan L. Eder
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Publication number: 20130151458Abstract: Disclosed herein is a method and apparatus for hardware-accelerating various data quality checking operations. Incoming data streams can be processed with respect to a plurality of data quality check operations using offload engines (e.g., reconfigurable logic such as field programmable gate arrays (FPGAs)). Accelerated data quality checking can be highly advantageous for use in connection with Extract, Transfer, and Load (ETL) systems.Type: ApplicationFiled: February 5, 2013Publication date: June 13, 2013Applicant: Exegy IncorporatedInventor: Exegy Incorporated
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Publication number: 20130148802Abstract: An encryption technique is disclosed for encrypting a plurality of data blocks of a data segment where the encryption selectively switches between a blockwise independent randomized (BIR) encryption mode and a cipher block chaining (CBC) encryption mode based on a configurable feedback stride. A corresponding decryption technique is also disclosed.Type: ApplicationFiled: February 5, 2013Publication date: June 13, 2013Applicant: EXEGY INCORPORATEDInventor: Exegy Incorporated
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Patent number: 8458081Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) process each received financial market data message to update a stored record for the financial instrument associated with that message.Type: GrantFiled: March 31, 2011Date of Patent: June 4, 2013Assignee: Exegy IncorporatedInventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
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Publication number: 20130086096Abstract: Disclosed herein is a method and system for accelerating the generation of pattern indexes. In exemplary embodiments, regular expression pattern matching can be performed at high speeds on data to determine whether a pattern is present in the data. Pattern indexes can then be built based on the results of such regular expression pattern matching. Reconfigurable logic such a field programmable gate arrays (FPGAs) can be used to hardware accelerate these operations.Type: ApplicationFiled: November 27, 2012Publication date: April 4, 2013Applicant: Exegy IncorporatedInventor: Exegy Incorporated
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Patent number: 8407122Abstract: Methods and systems for processing financial market data using reconfigurable logic are disclosed. Various functional operations to be performed on the financial market data can be implemented in firmware pipelines to accelerate the speed of processing. Also, a combination of software logic and firmware logic can be used to efficiently control and manage the high speed flow of financial market data to and from the reconfigurable logic.Type: GrantFiled: March 31, 2011Date of Patent: March 26, 2013Assignee: Exegy IncorporatedInventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
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Patent number: 8379841Abstract: An encryption technique is disclosed for encrypting a data segment comprising a plurality of data blocks, wherein the security and throughput of the encryption is enhanced by using blockwise independent bit vectors for reversible combination with the data blocks prior to key encryption. Preferably, the blockwise independent bit vectors are derived from a data tag associated with the data segment. Several embodiments are disclosed for generating these blockwise independent bit vectors. In a preferred embodiment, the data tag comprises a logical block address (LBA) for the data segment. Also disclosed herein is a corresponding decryption technique as well as a corresponding symmetrical encryption/decryption technique.Type: GrantFiled: March 22, 2007Date of Patent: February 19, 2013Assignee: Exegy IncorporatedInventors: David E. Taylor, Ronald S. Indeck, Jason R. White, Roger D. Chamberlain
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Patent number: 8374986Abstract: Disclosed herein is a method and system for hardware-accelerating various data processing operations in a rule-based decision-making system such as a business rules engine, an event stream processor, and a complex event stream processor. Preferably, incoming data streams are checked against a plurality of rule conditions. Among the data processing operations that are hardware-accelerated include rule condition check operations, filtering operations, and path merging operations. The rule condition check operations generate rule condition check results for the processed data streams, wherein the rule condition check results are indicative of any rule conditions which have been satisfied by the data streams. The generation of such results with a low degree of latency provides enterprises with the ability to perform timely decision-making based on the data present in received data streams.Type: GrantFiled: May 15, 2008Date of Patent: February 12, 2013Assignee: Exegy IncorporatedInventors: Ronald S. Indeck, David Mark Indeck, Naveen Singla, Jason R. White
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Publication number: 20130007000Abstract: Disclosed herein is a method and system for integrating an enterprise's structured and unstructured data to provide users and enterprise applications with efficient and intelligent access to that data. In accordance with exemplary embodiments, the generation of metadata indexes about unstructured data can be hardware-accelerated by processing streaming unstructured data through a reconfigurable logic device to generate the metadata about the unstructured data for the index.Type: ApplicationFiled: April 9, 2012Publication date: January 3, 2013Applicant: EXEGY INCORPORATEDInventors: Ronald S. Indeck, David Mark Indeck