Patents Assigned to F.T.I. Co., Ltd.
  • Patent number: 5972116
    Abstract: In a method for producing a semiconductor device using a dual tube reactor, inert gas is fed into the vertical reaction-tube, a reaction gas is introduced into the vertical reaction-tube, the inert gas is exhausted through the annular channel formed between the inner tube and the outer tube at a bottom portion of the vertical reaction-tube; and, a wafer is heat treated in the vertical reaction-tube by means of a heating furnace. In order to decrease the number and size of the particles, the wafer is displaced upward and then positioned at a level substantially the same as or above the top end of the inner tube, and the reaction gas is introduced into the vertical reaction-tube at or above the position of the wafer. Furthermore, the inert gas is caused to flow from a bottom portion of the inner tube toward the wafer positioned as above. As a result, inflow of the reaction gas into the inner tube is impeded, and the generation of particles there can be lessened.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: October 26, 1999
    Assignee: F.T.I. Co., Ltd.
    Inventor: Mikio Takagi