Abstract: A single mode state machine for recovering the Universal Serial Bus (USB) clock from the USB. The claimed state machine running at 4X speed includes only five states and generates a 1X speed clock. When transmitting, the claimed invention acts as a divide-by-four counter and divides the 4X clock into a 1X clock to be used by control logic (for example, a Serial Interface Engine). When receiving, the same state group acts as a divide-by-four counter with the received data's status being continuously monitored to reset the state machine to an original state to dynamically adjust the duty cycle of the receiving clock. The exact selection of transition path is determined by the logical AND of a phase change within the data and a signal indicating whether the state machine is currently transmitting or receiving.