Patents Assigned to FASTOR SYSTEMS, INC.
  • Patent number: 9009391
    Abstract: Embodiments of apparatuses, methods and systems of solid state drive are disclosed. One embodiment of a solid state drive includes a non-blocking fabric, wherein the non-blocking fabric comprises a plurality of ports, wherein a subset of the plurality of ports are each connected to a flash controller that is connected to at least one array of flash memory. Further, this embodiment includes a flash scheduler for scheduling data traffic through the non-blocking fabric, wherein the data traffic comprises a plurality of data packets, wherein the flash scheduler extracts flash fabric header information from each of the data packets and schedules the data traffic through the non-blocking fabric based on the extracted flash fabric header information. The scheduled data traffic provides transfer of data packets through the non-blocking fabric from at least one array of flash memory to at least one other array of flash memory.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: April 14, 2015
    Assignee: Fastor Systems, Inc.
    Inventor: Ajoy Aswadhati
  • Patent number: 8935463
    Abstract: An embodiment of the invention includes a storage subsystem having a storage central processing unit (SCPU) operable to receive and send a command to a host, the command requiring data computation, a compute engine coupled to the SCPU, and a bank of memory devices coupled to the SCPU and the compute engine and configured to store data required by the commands, wherein the SCPU or the compute engine are operable to perform computation of the data.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: January 13, 2015
    Assignee: Fastor Systems, Inc.
    Inventors: Ajoy Aswadhati, Vijay Aswadhati
  • Publication number: 20120102263
    Abstract: Embodiments of apparatuses, methods and systems of solid state drive are disclosed. One embodiment of a solid state drive includes a non-blocking fabric, wherein the non-blocking fabric comprises a plurality of ports, wherein a subset of the plurality of ports are each connected to a flash controller that is connected to at least one array of flash memory. Further, this embodiment includes a flash scheduler for scheduling data traffic through the non-blocking fabric, wherein the data traffic comprises a plurality of data packets, wherein the flash scheduler extracts flash fabric header information from each of the data packets and schedules the data traffic through the non-blocking fabric based on the extracted flash fabric header information. The scheduled data traffic provides transfer of data packets through the non-blocking fabric from at least one array of flash memory to at least one other array of flash memory.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 26, 2012
    Applicant: FASTOR SYSTEMS, INC.
    Inventor: Ajoy Aswadhati