Abstract: Disclosed is an RS-485 circuit, which includes an RS-485 interface chip, a start detector, a control module and a counter. The RS-485 interface chip includes a data input terminal and an enable terminal, wherein the data input terminal is configured to receive a data signal, the enable terminal is configured to receive a start signal or a switching signal to make the RS-485 interface chip in a data transmitting state or a data receiving state. The start detector is configured to detect a first signal edge of the data signal to generate the start signal to the enable terminal. After detecting the first signal edge of the data signal, the control module outputs first counting information. The counter is configured to count based on the first counting information, and output the switching signal to the enable terminal when the counter expires.

Abstract: Disclosed is an RS-485 circuit, which includes an RS-485 interface chip, a start detector, a control module and a counter. The RS-485 interface chip includes a data input terminal and an enable terminal, wherein the data input terminal is configured to receive a data signal, the enable terminal is configured to receive a start signal or a switching signal to make the RS-485 interface chip in a data transmitting state or a data receiving state. The start detector is configured to detect a first signal edge of the data signal to generate the start signal to the enable terminal. After detecting the first signal edge of the data signal, the control module outputs first counting information. The counter is configured to count based on the first counting information, and output the switching signal to the enable terminal when the counter expires.

Abstract: A digital isolator provided includes a pair of transceiver circuits and a control circuit. Each transceiver circuit includes a transmitter circuit, a receiver circuit, and a DC isolation circuit. When the control circuit controls one of the pair of transceiver circuits to operate in a transmitting mode and the other of the pair of transceiver circuits to operate in a receiving mode, the transmitting circuit of the transceiver circuit operating in the transmitting mode receives a square wave signal to generate a pair of differential square wave signals, the connected DC isolation circuits receive the pair of differential square wave signals to generate a pair of differential coupling signals, and the transceiver circuit operating in the receiving mode uses the pair of differential coupling signals to output the square wave signal through the design of a pair of feedback voltage divider circuits and a differential comparison circuit included therein.

Abstract: A Dual-directional Silicon Controlled Rectifier (DSCR) includes a substrate of a first conductivity type, a buried layer formed on the substrate and of a second conductivity type, a first well and a second well formed on the buried layer and of the first conductivity type, a third well formed between the first well and the second well and of the second conductivity type, and a doped region formed between a first semiconductor region and a third semiconductor region and of the second conductivity type. The doped region includes a part of the third well. The DSCR may regulate a breakdown voltage of a junction thereof. Therefore, when an I/O voltage of an Integrated Circuit (IC) is much higher than a working voltage, a false action may not occur.

Abstract: The present invention provides a current control apparatus applied to a transistor. The transistor has a control terminal, a first terminal, and a second terminal. The current control apparatus includes a current control module, a first current mirror module, a second current mirror module, a current subtractor, and a current adjusting module. The current control apparatus provided by the present invention can be applied to a bipolar junction transistor (BJT) to prevent temperature measurement errors from occurring when using a dual current mode temperature measurement method to measure the temperature of the BJT.

Abstract: A controlling circuit for controlling an operating clock of a logic circuit in an electronic device and the method thereof are disclosed. The controlling circuit includes a storage device, a detector, at least one comparator, and a controller. The storage device stores a first threshold value and a first return value. The detector detects a system load of the electronic device to generate a detection value. The comparator compares the detection value with the first threshold value or the first return value. When the detection value decreases to reach the first threshold value, the comparator generates a first indication signal. When the detection value increase to reach the first return value, the comparator generates a second indication signal. The controller enables underclocking of the logic circuit when receiving the first indication signal, and disables underclocking of the logic circuit when receiving the second indication signal.

Abstract: A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a supply voltage applied to an electronic system. The load detector, coupled to the PWM controller, detects a load of the electronic system according to the PWM signal and generates a decision value accordingly. The adjusting module, coupled to the PWM controller and the load detector, controls the PWM controller to adjust the PWM signal according to the decision value.

Abstract: A method for detecting a power load of a power supply module, includes: receiving a pulse width modulation (PWM) signal generated by the power supply module, wherein the PWM signal is utilized for controlling a driving voltage outputted from the power supply module; detecting a duty cycle of the PWM signal; and determining the power load of the power supply module according to the duty cycle.

Abstract: A circuit for providing a reference voltage that includes a chopping circuit for generating a voltage level, a converter coupled to the chopping circuit for converting an input voltage into a digital output based on the voltage level, and generating a first output in a predetermined period, and a second output in a subsequent second predetermined period, a controller for controlling the chopping circuit such that the chopping circuit generates the voltage level in a same period as the predetermined period, a first register coupled to the converter for storing the first output, a second register coupled to the converter for storing the second output, and a combiner for combining the first and the second outputs.