Abstract: A resistance adjusting circuit including, a reference resistor, a first power source configured to output a first voltage, a first current source configured to output a first current based on a reference current set by using the reference resistor, a first variable resistor, a second current source configured to output a second current obtained by multiplying the first current by a reciprocal ratio, the reciprocal ratio being obtained as a reciprocal number of a ratio of a target resistance of the first variable resistor to a resistance of the reference resistor, and a controller configured to set a resistance of the first variable resistor so that a voltage at a second terminal of the reference resistor and a voltage at a connecting part of the first variable resistor and the second current source become equal to each other.

Abstract: In an optical modulator, lights that have been branched by an input optical branching section are input via curved waveguides to a plurality of optical modulation sections arranged in parallel on the same substrate. In the optical modulation sections, optical branching sections of an MZ type optical waveguide are arranged shifted to an output side in the longitudinal direction (x direction) of the substrate, corresponding to an arrangement of input ends of signal electrodes. As a result, even if the input ends of the signal electrodes of the respective optical modulation sections are arranged side by side with a predetermined spacing on one side face of the substrate, input light can be applied to the respective optical modulation sections at low loss, without incurring an increase in the drive voltage.

Abstract: In a method and apparatus for transferring data between a master unit MU, and slave units SU0, SU1 . . . SUX according to a synchronizing signal generated by the master unit MU, the master unit MU outputs information specifying a unit to be a data transferring source, and the unit corresponding to that information transmits data held by the unit itself and the other units so that, data transferring is performed between the units MU, SU0, SU1 . . . and SUX, and it becomes possible for all the units including the master unit to receive data from the data transmitting source.