Abstract: In a scan converter for converting polar-coordinate radar data into a standard video display scanned at a 100 ns per pixel rate, the reading of sixteen x-y pixels into the video buffer, writing of two polar pixels into the x-y memory, and fading of four x-y pixels in the x-y memory can all be accomplished in a single 1600 ns time slot by using a nibble mode of addressing with an x-y memory made up of four standard 64K chips operable in parallel. In another aspect of the invention, radar data can be written into the x-y memory of a scan converter at double that rate without affecting the read or fade capabilities by configuring the x-y memory chips in such a manner that a given address on the memory chips represents a group of adjacent pixels of one line of the display and a corresponding group of pixels of the next adjacent line of the display.