Abstract: A test system can include contact elements for making electrical connections with test points of a DUT. The test system can also include a DC test resource and a signal router, which can be configured to switch a DC channel from the DC test resource between individual contact elements in a group of contact elements.
Abstract: A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.
Abstract: Embodiments of the present invention can relate to probe card assemblies, multilayer support substrates for use therein, and methods of designing multilayer support substrates for use in probe card assemblies. In some embodiments, a probe card assembly may include a multilayer support substrate engineered to substantially match thermal expansion of a reference material over a desired temperature range; and a probe substrate coupled to the multilayer support substrate. In some embodiments, the reference material may be silicon.
Type:
Application
Filed:
August 25, 2009
Publication date:
March 3, 2011
Applicant:
FORMFACTOR, INC.
Inventors:
ERIC D. HOBBS, GAETAN L. MATHIEU, FRANK M. ZALAR
Abstract: A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder can be detached from the probe card assembly. The probe insert of the probe card assembly can be replaced by detaching the insert holder, replacing the probe insert with a new probe insert, and then reattaching the insert holder to the probe card assembly. The probe insert and holder can be integrally formed and comprise a single structure that can be detached from a probe card assembly and replaced with a different probe insert and holder.
Type:
Grant
Filed:
March 3, 2009
Date of Patent:
March 1, 2011
Assignee:
FormFactor, Inc.
Inventors:
Benjamin N. Eldridge, Carl V. Reynolds, Nobuhiro Kawamata, Takao Saeki
Abstract: Methods of fabricating an array of aligned microstructures on a substrate are disclosed. The microstructures may be spring contacts or other microelements. The methods disclosed include construction of an alignment substrate, alignment of die elements with the alignment substrate, and fixation of the aligned die elements to a backing substrate.
Type:
Grant
Filed:
May 25, 2006
Date of Patent:
March 1, 2011
Assignee:
FormFactor, Inc.
Inventors:
Benjamin N. Eldridge, Gaetan L. Mathieu
Abstract: A technique for distributing power to a plurality of dies uses a probe card. The probe card can include a plurality of regulators, each regulator accepting a bulk power input and producing a regulated output. The regulated output can be controlled by a programmable controller that accepts a tester-controlled power input and adjusts the regulated outputs as a function of the tester-controlled power input.
Abstract: A process or apparatus for testing a plurality of semiconductor dies on a semiconductor wafer utilizing a tester configured to test the dies in groups can include controlling as a logical whole provision of first test signals through a plurality of first communications channels to first probes organized into a plurality of N first probe die groups each configured to contact a different one of the dies of the wafer. One of the first communications channels can be a first common communications channel connected to probes in X of the N first probe die groups but not to probes in Y of the N first probe die groups. X can be at least two and Y can be at least one. The process can also include controlling as a logical whole provision of second test signals through a plurality of second communications channels to second probes organized into a plurality of second probe die groups each configured to contact a different one of the dies of the wafer.
Type:
Grant
Filed:
July 28, 2008
Date of Patent:
February 22, 2011
Assignee:
FormFactor, Inc.
Inventors:
Michael W. Huebner, Stefan J. Zschiegner
Abstract: Methods and apparatus for testing devices using serially controlled resources have been described. Examples of the invention can relate to an apparatus for testing a device under test (DUT). In some examples, an apparatus can include an integrated circuit (IC) having a serialized input coupled to test circuits, the test circuits selectively communicating test signals with the DUT responsive to a test control signal on the serialized input.
Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.
Abstract: A stiffener assembly for use with testing devices is provided herein. In some embodiments, a stiffener assembly for use with testing devices can be part of a probe card assembly that can include a stiffener assembly comprising an upper stiffener coupled to a plurality of lower stiffeners; and a substrate constrained between the upper stiffener and the plurality of lower stiffeners, the stiffener assembly restricting non-planar flex of the substrate while facilitating radial movement of the substrate with respect to the stiffener assembly.
Abstract: Resilient spring contacts for use in wafer test probing are provided that can be manufactured with a very fine pitch spacing and precisely located on a support substrate. The resilient contact structures are adapted for wire bonding to an electrical circuit on a space transformer substrate. The support substrates with attached spring contacts can be manufactured together in large numbers and diced up and tested before attachment to a space transformer substrate to improve yield. The resilient spring contacts are manufactured using photolithographic techniques to form the contacts on a release layer, before the spring contacts are epoxied to the support substrate and the release layer removed. The support substrate can be transparent to allow alignment of the contacts and testing of optical components beneath. The support substrate can include a ground plane provided beneath the spring contacts for improved impedance matching.
Type:
Grant
Filed:
December 2, 2008
Date of Patent:
February 8, 2011
Assignee:
FormFactor, Inc.
Inventors:
Benjamin N. Eldridge, Bruce Jeffrey Barbara
Abstract: A probe substrate for use in testing semiconductor devices can include a base substrate that can have first electrical terminals at a first pitch. One or more redistribution layers on the base substrate can include droplets of a conductive material that form redistribution traces extending from the first terminals to second electrical terminals at a second pitch different from the first pitch.
Type:
Grant
Filed:
November 4, 2008
Date of Patent:
February 1, 2011
Assignee:
FormFactor, Inc.
Inventors:
Benjamin N. Eldridge, Yoshikazu Hatsukano, Igor Y. Khandros, Gaetan L. Mathieu
Abstract: A test system includes a communications channel that terminals in a probe, which contacts an input terminal of an electronic device to be tested. A resistor is connected between the communications channel near the probe and ground. The resistor reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The channel may be terminated in a branch having multiple paths in which each path is terminated with a probe for contacting a terminal on electronic devices to be tested. Isolation resistors are included in the branches to prevent a fault at one input terminal from propagating to the other input terminals. A shunt resistor is provided in each branch, which reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The shunt resistor may also be sized to reduce, minimize, or eliminate signal reflections back up the channel.
Abstract: An electronic device is moved into a first position with respect to probes for making electrical contact with the device. The electronic device is then moved into a second position in which the electronic device is pressed against the probes, compressing the probes. The movement into the second position includes two components. One component of the movement tends to press the electronic device against the probes, compressing the probes and inducing a stress in the probes. The second movement tends to reduce that stress. Test data are then communicated to and from the electronic device through the probes.
Type:
Grant
Filed:
April 6, 2007
Date of Patent:
January 11, 2011
Assignee:
FormFactor, Inc.
Inventors:
Timothy E. Cooper, Benjamin N. Eldridge, Igor Y. Khandros, Rod Martens, Gaetan L. Mathieu
Abstract: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.
Abstract: Embodiments of probe cards and methods for fabricating and using same are provided herein. In some embodiments, an apparatus for testing a device (DUT) may include a probe card configured for testing a DUT; a thermal management apparatus disposed on the probe card to heat and/or cool the probe card; a sensor disposed on the probe card and coupled to the thermal management apparatus to provide data to the thermal management apparatus corresponding to a temperature of a location of the probe card; a first connector disposed on the probe card and coupled to the thermal management apparatus for connecting to a first power source internal to a tester; and a second connector, different than the first connector, disposed on the probe card and coupled to the thermal management apparatus for connecting to a second power source external to the tester.
Abstract: Rotating contact elements and methods of fabrication are provided herein. In one embodiment, a rotating contact element includes a tip having a first side configured to contact a device to be tested and an opposing second side; and a plurality of deformed members extending from the second side of the tip and arranged about a central axis thereof, wherein the tip rotates substantially about the central axis upon compression of the plurality of deformed members.
Abstract: Probes in a plurality of DUT probe groups can be connected in parallel to a single tester channel. In one aspect, digital potentiometers can be used to effectively switch the tester channel from a probe in one DUT probe group to a probe in another DUT probe group. In another aspect, switches in parallel with a resistor can accomplish such switching. In yet another aspect, a chip select terminal on each DUT can be used to effectively connect and disconnect internal DUT circuitry to the tester channel. Multiple DUT probe groups so connected can be used to create different patterns of DUT probe groups for testing different patterns of DUTs and thus facilitate sharing tester channels.
Type:
Grant
Filed:
December 6, 2006
Date of Patent:
December 14, 2010
Assignee:
FormFactor, Inc.
Inventors:
Matthew E. Chraft, Benjamin N. Eldridge, Roy J. Henson, A. Nicholas Sporck
Abstract: A probe card assembly comprises multiple probe substrates attached to a mounting assembly. Each probe substrate includes a set of probes, and together, the sets of probes on each probe substrate compose an array of probes for contacting a device to be tested. Adjustment mechanisms are configured to impart forces to each probe substrate to move individually each substrate with respect to the mounting assembly. The adjustment mechanisms may translate each probe substrate in an “x,” “y,” and/or “z” direction and may further rotate each probe substrate about any one or more of the forgoing directions. The adjustment mechanisms may further change a shape of one or more of the probe substrates. The probes can thus be aligned and/or planarized with respect to contacts on the device to be tested.
Type:
Grant
Filed:
December 23, 2008
Date of Patent:
December 7, 2010
Assignee:
FormFactor, Inc.
Inventors:
Eric D. Hobbs, Benjamin N. Eldridge, Lunyu Ma, Gaetan L. Mathieu, Steven T. Murphy, Makarand S. Shinde, Alexander H. Slocum
Abstract: Methods and apparatus for testing semiconductor devices are provided herein. In some embodiments, an assembly for testing semiconductor devices can include a probe card assembly; and a thermal barrier disposed proximate an upper surface of the probe card assembly, the thermal barrier can restrict thermal transfer between tester side boundary conditions and portions of the probe card assembly disposed beneath the thermal barrier.
Type:
Grant
Filed:
September 28, 2007
Date of Patent:
November 30, 2010
Assignee:
FormFactor, Inc.
Inventors:
Eric D. Hobbs, Nobuhiro Kawamata, Andrew W. McFarland, Carl V. Reynolds, Yoichi Urakawa