Patents Assigned to Formosa Microsemi Co., Ltd.
-
Publication number: 20180166367Abstract: A flip-chip packaging diode with a multichip structure includes at least two flip-chips arranged with an interval apart from each other and horizontally disposed on the top of a lower guide plate, and each flip-chip has a bottom electrically connected to the lower guide plate and a top having a conductive layer. An insulating material is filled between the two flip-chips and at the outer periphery of the two flip-chips, so that the conductive layers at the tops of the two flip-chips are isolated to form a first electrode and a second electrode for electrically connecting an external circuit. With this structure, a series circuit is formed between the two flip-chips.Type: ApplicationFiled: January 6, 2017Publication date: June 14, 2018Applicant: FORMOSA MICROSEMI CO., LTD.Inventors: Wen-Hu WU, Chien-Wu CHEN, His-Piao LAI, Hui-Min LIN
-
Patent number: 9064856Abstract: In the Flip-Chip type LED component built therein with a Zener chip: a Flip-Chip LED chip and a Flip-Chip Zener straddle respectively over and beneath two electrode pins, wherein the Flip-Chip Zener is covered with insulating material to form a base and the Flip-Chip LED chip is covered with a transparent package to thereby form an integral Flip-Chip LED component, hence not only the Flip-Chip LED component can be protected in use, but also can largely simplify the production process and reduce the cost of production.Type: GrantFiled: May 9, 2014Date of Patent: June 23, 2015Assignee: FORMOSA MICROSEMI CO., LTD.Inventors: Wen-Ping Huang, Tzuu-Chi Hu
-
Patent number: 8791551Abstract: A well-through type diode element/component manufacturing method which has a pair (pairs) of first and said second electrodes of a diode element/component built on same plane by a process of metallization after a mode of well-through type to penetrate a PN junction depletion region/barrier region, and leads electrons of one of the electrodes to flow through the Depletion/Barrier region without hindrance; the present invention directly conduct the operations of insulation protecting, metallization and the process of elongate welding ball etc., it can independently complete a novel technique of Chip-Scale Package (CSP); it has the features of: grains being exactly the article produced, no need of connecting lines, low energy consumption, low cost and light, thin and small etc.Type: GrantFiled: March 13, 2012Date of Patent: July 29, 2014Assignee: Formosa Microsemi Co., Ltd.Inventors: Wen-Ping Huang, Wen-Hu Wu, His-Piao Lai, Chien-Wu Chen
-
Patent number: 8742533Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.Type: GrantFiled: August 29, 2011Date of Patent: June 3, 2014Assignee: Formosa Microsemi Co., LtdInventors: Sheau-Feng Tsai, Wen-Ping Huang, Tzuu-Chi Hu
-
Publication number: 20130241056Abstract: A well-through type diode element/component manufacturing method which has a pair (pairs) of first and said second electrodes of a diode element/component built on same plane by a process of metallization after a mode of well-through type to penetrate a PN junction depletion region/barrier region, and leads electrons of one of the electrodes to flow through the Depletion/Barrier region without hindrance; the present invention directly conduct the operations of insulation protecting, metallization and the process of elongate welding ball etc., it can independently complete a novel technique of Chip-Scale Package (CSP); it has the features of: grains being exactly the article produced, no need of connecting lines, low energy consumption, low cost and light, thin and small etc.Type: ApplicationFiled: March 13, 2012Publication date: September 19, 2013Applicant: FORMOSA MICROSEMI CO., Ltd.Inventors: Wen-Ping HUANG, Wen-Hu Wu, His-Piao Lai, Chien-Wu Chen
-
Publication number: 20130075891Abstract: This invention reveals a flip-chip type full-wave rectification semiconductor device which includes at least a PNNP type and/or NPPN type flip-chip, and a sheet stuff or substrate including a plurality pins, and which is characterized in that: all the soldering points (bumps) of the PNNP type and/or the NPPN type flip-chip are on an identical surface, this can make easy connecting of the pins with the bumps of the flip-chips by soldering in pursuance of circuit arrangement of the full-wave rectification device, and complete manufacturing product after the steps of shaping/packing and cutting; such product has a function of making full-wave rectifying, and can simplify the manufacturing process, reduce the manufacturing cost, and get an effect of reducing the size of the product with better heat dissipation, being different from traditional full wave rectification semiconductor devices composed of two/four grains.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: FORMOSA MICROSEMI CO., Ltd.Inventors: Wen-Ping HUANG, Paul Wu
-
Patent number: 8404565Abstract: A manufacturing method and a structure of a surface-mounting type diode co-constructed from a silicon wafer and a base plate, in the method, a diffused wafer is stacked with a high temperature durable high strength base plate to have them sintered and molten together for connecting with each other to form a co-constructure; then the diffused wafer is processed by etching and ditching for filling with insulation material, electrodes of the diffused wafer are metalized and all on an identical plane, then production of all functional lines is completed; and then the co-constructure is cut to form a plurality of separated individuals which each forms a surface-mounting type diode to be applied straight. In comparison with the conventional techniques, manufacturing of the present invention is simplified and economic in reducing working hours, size and cost of production and the wafer is not subjected to breaking during manufacturing.Type: GrantFiled: May 4, 2010Date of Patent: March 26, 2013Assignee: Formosa Microsemi Co., Ltd.Inventors: Wen-Ping Huang, Paul Wu
-
Publication number: 20130049160Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.Type: ApplicationFiled: August 29, 2011Publication date: February 28, 2013Applicant: FORMOSA MICROSEMI CO., Ltd.Inventors: Sheau-Feng TSAI, Wen-Ping Huang, Tzuu-Chi Hu
-
Publication number: 20110272777Abstract: A manufacturing method and a structure of a surface-mounting type diode co-constructed from a silicon wafer and a base plate, in the method, a diffused wafer is stacked with a high temperature durable high strength base plate to have them sintered and molten together for connecting with each other to form a co-constructure; then the diffused wafer is processed by etching and ditching for filling with insulation material, electrodes of the diffused wafer are metalized and all on an identical plane, then production of all functional lines is completed; and then the co-constructure is cut to form a plurality of separated individuals which each forms a surface-mounting type diode to be applied straight. In comparison with the conventional techniques, manufacturing of the present invention is simplified and economic in reducing working hours, size and cost of production and the wafer is not subjected to breaking during manufacturing.Type: ApplicationFiled: May 4, 2010Publication date: November 10, 2011Applicant: FORMOSA MICROSEMI CO., Ltd.Inventors: Wen-Ping Huang, Paul Wu
-
Publication number: 20050259400Abstract: The heat sinking structure of the present invention is fixedly provided on the surface of a crystal layer of a semiconductor with a heat conducting plate made of copper, the heat conducting plate has therein a plurality of channels parallel to the surface of the crystal layer, the channels extend through the heat conducting plate to form passageways for guiding air flow to exhaust, and to speed up the heat exchanging of the heat conducting plate with air, so that a heat sinking structure that is structurally firm, small by volume and high in efficiency of heat sinking as well as easy for processing in manufacturing is obtained.Type: ApplicationFiled: May 24, 2004Publication date: November 24, 2005Applicant: FORMOSA MICROSEMI CO., LTD.Inventor: Wen-Ping Huang