Patents Assigned to Fortis Systems Inc.
  • Publication number: 20050091632
    Abstract: The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to accommodate the format of existing mask writer. The complexity of the correction after OPC can create some issues for vector-scan e-beam mask writing tools as very small slivers are created when the data is converted to the mask write tool format. Moreover the number of shapes created after fracturing is quite large and are not related to some important characteristics of the layout like for example critical areas. A new technique is proposed where the order of the OPC and fracturing steps is reversed. The fracturing step is done first in order to guarantee that no slivers are created and that the number of shapes is minimized. The shapes created can also follow the edges of critical zones so that critical and non-critical edges can be differentiated during the subsequent OPC step.
    Type: Application
    Filed: October 27, 2003
    Publication date: April 28, 2005
    Applicant: Fortis Systems Inc.
    Inventors: Christophe Pierrat, Alfred Wong
  • Publication number: 20050076316
    Abstract: Subtleties of advanced fabrication processes and nano-scale phenomena associated with integrated circuit miniaturization have exposed the insufficiencies of design rules. Such inadequacies have adverse impact on all parts of the integrated circuit creation flow where design rules are used. In addition, segregation of the various layout data modification steps required for deep sub-micrometer manufacturing are resulting in slack and inefficiencies. This invention describes methods to improve integrated circuit creation via the use of a unified model of fabrication processes and circuit elements that can complement or replace design rules. By capturing the interdependence among fabrication processes and circuit elements, the unified model enables efficient layout generation, resulting in better integrated circuits.
    Type: Application
    Filed: October 7, 2003
    Publication date: April 7, 2005
    Applicant: Fortis Systems Inc.
    Inventors: Christophe Pierrat, Alfred Wong
  • Publication number: 20050068639
    Abstract: Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.
    Type: Application
    Filed: September 26, 2003
    Publication date: March 31, 2005
    Applicant: Fortis Systems Inc.
    Inventors: Christophe Pierrat, Alfred Wong
  • Publication number: 20050007567
    Abstract: Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact or proximity printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 13, 2005
    Applicant: Fortis Systems Inc.
    Inventors: Christophe Pierrat, Alfred Wong
  • Publication number: 20040205688
    Abstract: Proximity effect correction has become a necessary step in the fabrication of integrated circuit in order to improve the pattern fidelity of current lithography processes. Current methodology is limited by data volume increase and correction inaccuracy due to extrapolation of the correction. The invention describes a methodology based on the interpolation of the correction between selected evaluation points of the target layout. By connecting the correction points this technique also provides a mean of reducing data volume and simplifying the mask writing, inspection and repair processes. The same methodology can be applied to layouts with non-printing assist features, where the correction of the assist features is based on the quality of the image of the main feature. For vector-scan mask write tool the segments interpolating the corrections can be fractured in segments with suitable angles.
    Type: Application
    Filed: April 14, 2003
    Publication date: October 14, 2004
    Applicant: FORTIS SYSTEMS, INC.
    Inventor: Christophe Pierrat