Abstract: A modular arithmetic method and microelectronic apparatus therefore, operative to perform a sequence of interleaved Montgomery type multiplications and squaring operations, involves performing a sequence of modular multiplications and squarings using only a single carry save adder. Each multiplication is operative to perform the equivalent of three natural integer multiplication operations using an anticipatory device to determine a Y0 value, such that a result is an exponentiation.

Abstract: This invention discloses an encryption method for generating an encrypted message which is controllably decryptable, the method including providing at least one agency public key to at least one decrypting agency entity respectively and to each of a first plurality of subscriber entities and to each of a second plurality of regulator entities, providing an ID, a public key and a private key for each of the first plurality of subscribers and each of the second plurality of regulators, for each subscriber entity and for each regulator entity, employing at least one agency public key to encrypt the entity's private key, and for each individual subscriber entity and for each individual regulator entity, generating a certificate attesting, for all other entities, to the individual entity's status, ID, public key and encrypted private key.

Abstract: A compact synchronous microelectronic peripheral machine for standard microprocessors with means for proper clocking and control, has as essential elements: three main subdivided, switched and clocked shift registers, B, S, and N; two only multiplexed serial/parallel multipliers; borrow detectors, ancillary subtractors and adders; delay registers and switching elements; all of which embody a totally integrated concurrent and synchronous process approach to modular multiplication, squaring, and exponentiation. A method for carrying out modular multiplication, wherein the multiplicand A, the multiplier B and the modul, N, comprise m characters of k bits each, the multiplier not being greater than the modulus, is also described, wherein the multiplicand can be much larger than the modulus. It is demonstrated how the device can be used as a large number processor in the normal field of numbers.

Abstract: An encryption method and apparatus for generating an encrypted message which is controllably decryptable, comprising providing at least one agency public key to at least one decrypting agency entity respectively and to each of a first plurality of subscriber entities and to each of a second plurality of regulator entities, providing an ID, a public key and a private key for each of the first plurality of subscribers and each of the second plurality of regulators, for each subscriber entity and for each regulator entity, employing at least one agency public key to encrypt the entity's private key and for each individual subscriber entity and for each individual regulator entity, generating a certificate attesting, for all other entities, to the individual entity's status, ID, public key and encrypted private key.

Abstract: A compact synchronous microelectronic peripheral machine for standard microprocessors with means for proper clocking and control, has as essential elements: three main subdivided, switched and docked shift registers, B, S, and N; two only multiplexed serial/parallel multipliers; borrow detectors, ancillary subtractors and adders; delay registers and switching elements; all of which embody a totally integrated concurrent and synchronous process approach to modular multiplication, squaring, and exponentiation. A method for carrying out modular multiplication, wherein the multiplicand A , the multiplier B and the modul, N, comprise m characters of k bits each, the multiplier not being greater than the modulus, is also described, wherein the multiplicand can be much larger than the modulus. It is demonstrated how the device can be used as a large number processor in the normal field of numbers.

Abstract: A Digital Signature Device includes hardware device for carrying out an operation AB2.sup.-n mod N and an operation AB mod N, and carrying out modular exponentiation and modular multiplication based on an operation AB2.sup.-n mod N and an operation AB mod N. A method of performing an operation AB2.sup.-n mod N, an operation AB mod N, modular exponentiation, and modular multiplication by using hardware device, such as electrical controller, feeder, and delay device, etc.