Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: A system that has plural different photodetector circuits, each photodetector circuit including its own transfer gate, and each of the plural different photodetector circuits and transfer gates commonly connected to a first node. In amplifier is used which maintains a fixed voltage edits input. The amplifier Has a first capacitance to ground in a second capacitance as a feedback between its output and input. In one embodiment, there are 16 photodetector circuits connected to the single amplifier. In embodiments, the photodetector circuits can be located in one substrate while the amplifier is located in another substrate, and the amplifier also minimizes parasitics between the substrates.

Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.

Abstract: Disclosed herein are improved in-pixel correlated double sampling elements for photodetectors. The novel circuits and associated methods of the invention allow for accurate correlated double sampling while avoiding the inherent sampling errors that may occur in prior art in-pixel correlated double sampling techniques when bright or saturating signals are received.

Abstract: Disclosed herein are novel charge mode readout circuits and associated methods of signal processing. The devices and methods of the invention allow for the improved processing of stored signals by a charge mode readout amplifier, wherein the readout level may be shifted to a desired range and wherein a fully differential output swing may be imparted. The invention advantageously employs a single pair of capacitors to serve the dual roles of modulating amplifier gain and level shifting the output.

Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.

Abstract: An image sensor pixel the conformist single pixel of a larger array. The image sensor pixel can be a large one, such as larger than 100 ?m. The image sensor pixel has readout notes on multiple sides thereof, e.g. on to work for sides, that are symmetrically located on the pixel. The readout notes are simultaneously read out to read out a part of the image from the pixel.

Abstract: Provided herein is a novel pixel circuit for image sensors such as IR ROIC image sensors. The design provides a switchable pixel with two modes. In the first mode, the pixel performs in-pixel correlated double sampling to remove reset noise. In the second mode, the pixel is configured in a high-capacity mode to avoid saturation. The pixel may be dynamically switched between modes, for example in response to lighting conditions in the scene to be imaged.

Abstract: An imaging device and method for operating the imaging device. Some embodiments comprise a pixel array configured as rows and columns of binning pixel units, each binning pixel unit including a plurality of photosensors that generate respective charge signals in response to incident light. Each binning pixel unit is configured to selectively bin the charge from at least two of the photosensors. The pixel array may be readout in a binning-pixel-unit row by binning-pixel-unit row basis. During readout of each binning pixel unit row, each binning pixel unit in the row is operable to selectively bin at least two of the charge signals therein based on a respective one of control signals provided to each of the binning pixel units in the row. In reading out a binning pixel unit row for a given image frame, a first binning pixel unit may perform in-pixel charge domain binning while a second binning pixel unit in the row may not bin the charge from the different photosensors therein.

Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which an ADC comprises built-in redundancy such that the ADC can start its conversion cycle before the ADC input settles to a desired resolution and the ADC can yet accurately convert the ADC input to a digital value with the desired resolution. In a CMOS image sensor, such an ADC configuration enables the pixel readout time to overlap with the ADC conversion time, reducing the total time needed to convert the pixel signal value to a digital value with the desired resolution.

Abstract: Presented herein are novel shared amplifier charge mode readout architectures for image sensors, for example, configured to process a pair of signals comprising photointegration and reset signals from a pixel. The invention encompasses a novel 2-channel configuration wherein a single amplifier can serve the two channels in alternating phases. In the first phase, a selected pair of signals from the first channel is read out to an ADC using the amplifier while the readout components of the second channel are reset. In the second phase, a selected pair of signals from the second channel is read out an ADC using the amplifier while the readout components of the first channel are reset. This alternating arrangement allows a single amplifier to be shared between two readout channels. Level shifting may be included in the signal pathway to modulate output swing and other signal parameters.

Abstract: An image sensor array that has a plurality of image sensing pixels and a plurality of programmable gain amplifiers, each of the programmable gain amplifiers connected to receive and amplify an output of said image sensing pixels. Each of said programmable gain senses when an output of the programmable gain amplifier is in an oversaturated condition. Responsive to sensing that the output of the programmable gain amplifier in the oversaturated condition, the amplifier automatically clamps a bias amount to the programmable gain amplifier, to thereby regulate an amount of current draw of the programmable gain amplifier. In this way, the power supply current to that pixel which is oversaturated is prevented from affecting power supplies to the other pixels, by regulating the power supply to the oversaturated pixel.

Abstract: An image sensor system has a first stitched image sensor part that has multiple image sensing pixels and pixel gates. The multiple pixel gates are connected together by a first line on the first stitched image sensor part, and said multiple pixel gates are controlled by a first control signal. A second stitched image sensor part also has multiple sensing pixels and pixel gates, and the multiple pixel gates are connected together by a second line on said second stitched image sensor part, and said multiple pixel gates on said second stitched image sensor part are controlled by the first control signal. A driver for the first control signal, wherein said driver includes a first part for controlling said multiple pixel gates of said first stitched image sensor part and said driver has a second part, also driven by the same first control signal, for controlling said multiple pixel gates of said second stitched image sensor part.

Abstract: An image sensor system that compensates the amplifier in a column of a pixel array. This uses a sampling capacitor, that receives a signal from a pixel of the pixel array. A first plate of the sampling capacitor receives a value from the amplifier representing an offset level of the amplifier. While receiving the offset level from the amplifier on the first plate, the capacitor receives information from the pixel on a second plate of the same capacitor that is receiving the offset, thereby canceling the offset. The value from said sampling capacitor indicative of said information from said pixel with said offset cancelled being coupled to said amplifier to amplify said value as a first pixel value. The amplifier is also connected to other selecting switches from other pixels of said column of the pixel array.

Abstract: The invention comprises an improved process of reading out SRAM or like memory elements which utilize pre-charging of cell output buses. In the output configuration of the invention, Gray Code counter outputs are used as inputs in a decoder block, the decoder block being configured to output a valid column selection address for every two address inputs. These column outputs are mapped sequentially to the columns of the memory array, such that the columns are sequentially read out, each readout operation being interspersed with a parking interval. The Gray code address inputs reduce readout addressing errors and the parking interval creates a delay between cell readout operations that reduces glitch errors.

Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which pixels can be readout non-destructively, and wherein a non-destructive pixel read may be used to provide a coarse analog-to-digital conversion such that information can be stored, and the stored information is then applied in a fine analog-to-digital conversion during a subsequent actual pixel read.

Abstract: A circuit for an image sensor pixel receives photogenerated information from an image sensor, such as infrared sensor. The circuit includes a single ended operational amplifier, they can have a simple circuit such as for example 4 transistors. An additional transistor is used in the pixel to regulate the voltage that is used to drive the operational amplifier, to maintain that voltage relative to a bias level. This prevents voltage fluctuations, which would otherwise be passed to the pixel output.

Abstract: An image sensor system has an input from a photosensor, receiving photogenerated electricity, and coupling said photogenerated electricity to a first photodiode to integrate the photogenerated electricity. The photodiode can be a pinned diode, configured to act integrate charge.

Abstract: An image sensor array that has a buffer amplifier, having a capacitor which receives photogenerated energy from a photodetector, and stores the photo generated energy in a capacitor of the buffer amplifier. A reset across the buffer amplifier is applied at a time which is sufficient to allow the amplifier to settle transiently prior to applying the clamp voltage. There is also a source follower that is enabled to operate at a time just before snapshot operation, and then turned off when the snapshot is over, to save on power.