Abstract: A microcoded processor for use in a distributed processing telex exchange to time share process each termination connected to the processor is disclosed. The processor executes selected signaling routines for each termination. The processor contains a sequence file that outputs the address of the next termination to be time share processed. This information controls the transfer of data between the processor and the termination currently being time share processed. Also included in the processor is a constant and a variable data file which contains blocks of data associated with each termination and which contains data needed to execute the selected signaling routine for each termination. A program re-entry file is provided to control the time share execution of each signaling routine since only a predetermined number of microcode instructions are executed in each time share interval.

Abstract: A digital phase-locked loop consisting of a digital phase detector for detecting the phase differences between the output and the input frequency signals, a microprocessor programmed to perform both the functions of the loop filter and the phase shifter, and a binary rate multiplier to perform the function of voltage-to-frequency conversion is disclosed. A more precise frequency resolution is obtained by use of the binary rate multiplier and a further reduction in circuit complexity is achieved by removal of the phase shifter circuit in favor of the microprocessor programming.

Abstract: A teletypewriter line keyer with a switching current regulator responsive to a floating, loop current powered voltage comparator used as a loop current monitor. The line keyer, which may have positive and negative line current keying, uses a single current monitor to control positive and negative current regulators responsive to the positive and negative keying respectively. The switching regulators operate within a relatively narrow band centered around the nominal signaling current, with filtering being provided for ripple control. The circuit may also include a keying detector and open loop detector for system monitoring.

Abstract: A tone generator circuit used in a frequency shift keying (FSK) channel in a frequency division multiplexing (FDM) system is disclosed. Each frequency shift between the mark and space tone frequencies is programmed to generate a sequence of discrete intermediate frequencies according to a sinusoidal modulation waveform to produce transmitted tone signals having minimum sideband energy and minimum distortion. A modulation clock generator produces a predetermined number of clock cycles per bit time of the baud rate of the channel. The modulation clock is used to produce a sequence of address signals used to address a PROM containing a set of multiplying code words. Each code word represents a different output tone frequency. The code words are used in a binary rate multipler to multiply a crystal controlled clock signal by the decimal equivalent of the binary code word. The multiplied digital frequency signal is also divided by fixed division factors to produce an output digital tone signal.

Abstract: A distributed processing telex switch having different levels of processor control to handle the calls between terminations connected to the exchange is disclosed. A common control processor occupies the highest level of processor control and function as the system-wide manager. Next below common control is a plurality of master control processors which function to switch the command data between common control and the lower levels of processor control, and to handle the conversation data generated by each of the terminations connected to the exchange. Each master control processor controls a predetermined number of termination from among all of the terminations connected to the exchange. Connected to each master control processor is a plurality of group control processors which control the flow of data to and from a second predetermined number of terminations from among the terminations controlled by each master control processor.

Abstract: A circuit for the systematic handling of conversation data from a calling party to a called party for use in a distributed processing telex exchange is disclosed. The customer terminations connected to the exchange are divided into a predetermined number of groups of terminations having a predetermined number of terminations in each group. Associated with each group of terminations is a frame memory which has memory capacity for storing a single bit of conversation data from every termination connected to the exchange. Associated with each frame memory is a vector memory which has a memory location associated with each termination in a group. Each vector memory location contains a frame memory address that addresses the location in frame memory containing the conversation data to be forwarded down to the termination associated with the current vector memory address.

Abstract: A system for generating telex signaling sequences in each termination line in a group of customer termination is disclosed. The system includes a multi-line high-speed line control processor which transmits to and receives from each customer termination, data signals indicative of the signaling levels in the termination lines. The line control processor controls the termination signals by executing, in a time share mode, selected signaling routines for each termination. Connected between the line control processor and the customer terminations is a terminator controller means for selecting the termination currently being time share processed to input to or receive signals from the line control processor. Also connected to the line control processor is a group control processor which supervises the generation of the signaling sequences in each termination by executing script task routines.

Abstract: A modular interfacing assembly for providing termination connections between customer termination leads and input-output signal pins of a printed circuit card cage assembly is disclosed. The assembly consists of a rotatable frame having multiple interface boards mounted thereon. Each interface board provides for a certain number of terminations. A plurality of termination blocks containing termination pins suitable for attaching the customer termination leads to is mounted to the interface boards. The termination blocks, once installed onto the interface boards, cooperate with a portion of the board to provide a supporting channel for the customer termination leads. Also, contained on the interface boards are any special interface circuits, such as balancing resistors, that are required between the customer termination units and the input-output signal sources.

Abstract: In a Telex switching system line terminator unit having means to transmit a character from the terminator to its terminal, in which the character is transmitted in a serial mode and terminated by a stop bit, an improvement in the manner of generating the stop bit is provided. A variable length stop bit is dynamically generated for each character transmitted such that the length of the stop bit is changed as the time required by the calling terminal to transmit the character to its terminator unit decreases over that required by the called terminator unit to transmit the character to the called terminal. Patterns in the rate of transfer of characters from the calling terminator unit to the called terminator unit are monitored to control the length of the stop bit.

Abstract: A phase locked loop signal generator is especially adapted for synthesizing a selectable frequency signal for exciting an HF radio frequency transmitter to transmit over the seven marine telegraph bands. The signal generator includes an oscillator for providing a highly stable frequency standard. Another signal generator is responsive to the frequency standard and to frequency selector signals input by the operator for generating an exciter signal which is coupled to the transmitter for effecting the RF transmission within a predetermined frequency range.